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PRELIMINARY DATA SHEET
VPC 323xD
C o m b F ilte r V id e o P ro c e s s o r
1. In tro d u c tio n
The VPC 323xD is a high-quality, single-chip video
front-end, which is targeted for 4:3 and 16:9, 50/60-Hz
and 100/120 Hz TV sets. It can be combined with other
members of the DIGIT3000 IC family (such as
DDP 331x) and/or it can be used with 3rd-party prod­
ucts.
The main features of the VPC 323xD are
- high-performance adaptive 4H comb filter Y/C sepa­
rator with adjustable vertical peaking
- multi-standard color decoder PAL/NTSC/SECAM
including all substandards
- four CVBS, one S-VHS input, one CVBS output
- two RGB/YCrCb component inputs, one Fast Blank
(FB) input
- integrated high-quality A/D converters and associ­
ated clamp and AGC circuits
- multi-standard sync processing
- linear horizontal scaling (0.25 ... 4), as well as
non-linear horizontal scaling ‘Panoramavision'
- peaking, contrast, brightness, color saturation and
tint for RGB/YCrCb and CVBS/S-VHS
- high-quality soft mixer controlled by Fast Blank
- PIP processing for four picture sizes (1-, 1-,
1 6
, or
36
of normal size) with
8
-bit resolution
- 15 predefined PIP display configurations and expert
mode (fully programmable)
- control interface for external field memory
- I
2
C-bus interface
- one 20.25-MHz crystal, few external components
- 80-pin PQFP package
1 .1 . S y s te m A r c h ite c tu r e
Fig.1-1 shows the block diagram of the video proces­
sor
- PAL+ preprocessing
- line-locked clock, data and sync, or 656-output
interface
c i n o
VIN1 O
V I N 2 0
V I N 3 0
V IN 4 0 -
V O U T O
R G B /
Y C rC b
F B O
R G B /
q
-
Y C rC b
Y O U T
LL C o c k
H S ync
V S ync
AVO
HDH
20 .2 5 M H z I2C Bus
F ig . 1 - 1 :
Block diagram of the VPC 323xD
Micronas
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