
Netw
ork
Analyzer
System
Description
Digital
Signal
Processing
Digital
signal
pro cessing
(DSP),
Figure
3-3 ,
pro ceeds
under
con
trol
of
the
8510
rm
w
are
op erating
system
executed
b
y
the
main
CPU
(cen
tral
pro cessing
unit).
CPU
and
Memory
Description
The
CPU
is
a
32-bit
Motorolla
68000
micropro
cessor
equipp ed
with
1
Mb
yte
of
RAM,
and
512
Kb
ytes
of
EEPR
OM.
The
rm
w
are
op erating
system
is
stored
p ermanen
tly
in
non-v
olatile
memory
,
then
loaded
in
to
active
(v
olatile)
memory
eac
h
time
p o
w
er
is
applied.
The
CPU
takes
adv
an
tage
of
m
ulti-tasking
softw
are
arc
hitecture,
and
sev
eral
distributed
pro cessors,
to
pro
vide
a
v
ery
fast
data-acquisition
and
display-up date
rate.
The
CPU
accepts
the
digitized
real
and
imaginary
data,
corrects
for
IF
gain
and
quadrature
errors
b efore
the
reference
and
test
pairs
are
ratio
ed.
If
0
is
selected,
the
data
is
a
v
eraged,
then
stored
in
c
hannel
1
or
c
hannel
2
raw
data
array
.
The
constan
ts
used
in
this
IF
correction
are
obtained
p erio
dically
with
an
automatic
self-calibration
op eration
that
is
in
visible
to
the
op erator.
Data
Processing
Steps
While
data
acquisition
softw
are
is
con
tinually
lling
the
raw
data
arrays,
the
data
pro cessing
softw
are
is
pro cessing
the
data
for
the
t
w
o
indep enden
t
display
c
hannels.
If
error
correction
is
turned
on,
the
raw
data
and
error
co ecien
ts
from
the
selected
calibration
co ecien
t
set
are
used
in
appropriate
computations
b
y
a
dedicated
v
ector
math
pro cessor.
Next,
magnitude
and
phase
osets
commanded
b
y
the
electrical
dela
y
,
reference
plane
extensions,
magnitude
oset,
and
magnitude
slop
e
under
the
RESPONSE
men
u
structure
are
added
to
the
data.
If
time-domain
mo
de
is
a
v
ailable
and
selected,
the
corrected
data
is
con
v
erted
from
the
frequency
domain
to
time
domain
using
the
in
v
erse
F
ourier
Chirp-Z
transform
tec
hnique.
The
results
are
stored
in
to
the
corrected
data
arrays.
Memory
arrays
are
lled
from
the
corrected
data
arra
y
,
b
y
con
trol
of
the
user,
with
trace
data
for
use
in
v
ector
computations
with
curren
t
corrected
data.
If
trace
math
is
selected,
v
ector
m
ultiplication,
division,
addition,
or
subtraction
is
p erformed.
Results
are
formatted
according
to
the
F
ORMA
T
selection,
p oint-to-p
oint
smo
othing
is
applied,
if
selected,
and
stored
in
to
the
formatted
data
arrays.
T
races
are
no
w
scaled,
then
sen
t
to
the
display
memory
where
the
trace
data
is
com
bined
with
dieren
t
display
annotation
data.
A
dedicated
display
pro cessor
async
hronously
con
v
erts
the
formatted
data
and
annotations
for
viewing
at
a
ic
k
er-free
rate
on
the
v
ector-writing
display
.
Principles
of
Operation
3-5
Содержание 8510C
Страница 7: ...vii ...
Страница 29: ......
Страница 61: ......
Страница 73: ...Network Analyzer System Description Figure 3 7 Recommended Typical Test Setups 3 12 Principles of Operation ...
Страница 98: ...DISPLAY Functions Figure 4 9 Display Menu Showing Trace Memory Locations Menu Measurement Controls 4 19 ...
Страница 105: ...FORMAT Functions Figure 4 12 Format Function Block and Format Menu 4 26 Measurement Controls ...
Страница 106: ...FORMAT Functions Figure 4 13 Format Selections 1 of 2 Measurement Controls 4 27 ...
Страница 107: ...FORMAT Functions Figure 4 14 Format Selections 2 of 2 4 28 Measurement Controls ...
Страница 122: ...PARAMETER Functions Figure 4 25 Redefine Parameter Menu Structure Measurement Controls 4 43 ...
Страница 175: ......
Страница 203: ......
Страница 223: ...Measurement Calibration Figure 8 2 Cal Type Selections 8 8 Calibrating for System Measurements ...
Страница 267: ...Figure 9 14 Typical Group Delay and Deviation from Ideal Phase Displays 9 14 Transmission Measurements ...
Страница 273: ......
Страница 297: ......
Страница 305: ......
Страница 391: ......