ADLINK Technology NuDAQ ACL-8454, Руководство пользователя

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Registers Format
Chip #4
1 1
3.4 Digital Input Registers
There are 16 digital input channels on the ACL-8454. The digital
input channels are common with the external gate signals (
ExtG 1~3
& ExtG 7~10 ) and the external clock signals ( ECLK 1~3 & ECLK
7~10 ). The external clock source ECLK n and external gate control
ExtG n can be read back from the DI ports. When the external clock
sources and the external gate signals are not used for counters,
these channels can be used as digital input signal dedicatedly. For
example, the chip #3 and #4 are not installed under default
configuration,
ECLK7~10 and external gate ExtG7~10 are not used
hence the port (BASE+5) can be used as a digital input port
dedicatedly. Even if these external clock or gate signals are used for
counters, the input port can still monitor their signal level.
Address : BASE + 4 & BASE + 5
Attribute :
read only
Data Format :
Bit 7 6 5 4 3 2 1 0
Base + 4 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
Base + 5 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8
or
Bit 7 6 5 4 3 2 1 0
Base + 4 ExtG4 ExtG3 ExtG2 ExtG1 ECLK4 ECLK3 ECLK2 ECLK1
Base + 5 ExtG10 ExtG9 ExtG8 ExtG7 ECLK10 ECLK9 ECLK8 ECLK7
3.5 Digital Output Register
The register is a general purpose 8 bits digita l output port. These
signals can be used to control external devices.
Address : BASE + 5
Attribute :
write only
Data Format :