ADLINK Technology NuDAQ ACL-8454, Руководство пользователя

Страница: 24 / 65

14
•
Installation
8254 Chip
Number
Reference
Number
Counter
Number
Type of
Counter
Installed
on
Counter #1 Independent ACL-8454/6
Chip #1 U1 Counter #2 Independent ACL-8454/12
Counter #3 Independent
Counter #4 Independent ACL-8454/6
Chip #2 U2 Counter #5 ACL-8454/12
Counter #6 Cascaded
Counter #7 Independent
Chip #3 U3 Counter #8 Independent ACL-8454/12
Counter #9 Independent
Counter #10 Independent
Chip #4 U4 Counter #11
ACL-8454/12
Counter #12 Cascaded
Table 2.3 Default Counters Architecture
There are three signals (2 input,1 output) for each counter, a clock
input signal, a gate control signal, and an output signal. The Figure
2.7 illustrates the block diagram of 8254 counter.
CLK1 ~ CLK12
are clock sources and GATE1 ~ GATE12 are gate control signals.
The COUT1 ~ COUT12 are output of the counters. The Figure 2.8
shows all the labels and the inter-connection of the 8254 counters
when all the 4 chips are insatalled. The
COUT5 and COUT11 are
used only for internal.
Clock Source Input
Counter/Timer Output
Gate Control Input
Counter
8254 Chip
Figure 2.7 I/O pins of 8254 Counter