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46 

•

 Operation Theory 

 

 

0 

0 

1 

2 

3 

4 

5 

5 

5 

Gate 

CLK 

Count value 

Software start 

 

Figure 30:   Mode 2 Operation 

4.4.2.3 Mode 3: Single Pulse-width Measurement 

In this mode the counter counts the pulse-width of the signal on 
GPTC_GATE in terms of GPTC_CLK. Initial count can be loaded from 
software. After the software-start, the counter counts the number of active 
edges on GPTC_CLK when GPTC_GATE is in its active state. After the 
completion of the pulse-width interval on GPTC_GATE, GPTC_OUT out-
puts high and then current count value can be read-back by software. 
Figure 31 illustrates the operation where initial count = 0, count-up mode. 

 

 

0 

0 

1 

2 

3 

4 

5 

5 

5 

Gate 

CLK 

Count value 

Software start 

 

Figure 31:   Mode 3 Operation 

4.4.2.4 Mode 4: Single Gated Pulse Generation 

This mode generates a single pulse with programmable delay and pro-
grammable pulse-width following the software-start. The two programma-
ble parameters could be specified in terms of periods of the GPTC_CLK 
input by software. GPTC_GATE is used to enable/disable counting. When 
GPTC_GATE is inactive, the counter halts the current count value. Figure 
32 illustrates the generation of a single pulse with a pulse delay of two and 
a pulse-width of four. 

Содержание DAQ-20 Series

Страница 1: ...NuDAQ DAQ 2010 2005 2006 PXI 2010 2005 2006 4 CH Simultaneous High Performance Multi function Data Acquisition Card User s Guide Recycle Paper...

Страница 2: ...arising out of the use or inability to use the product or documentation even if advised of the possibility of such damages This document contains proprietary information protected by copyright All rig...

Страница 3: ...ech com Technical Support NuPRO EBC nupro adlinktech com TEL 886 2 82265877 FAX 886 2 82265717 Address 9F No 166 Jian Yi Road Chungho City Taipei 235 Taiwan Please email or FAX us of your detailed inf...

Страница 4: ...2 Unpacking 12 2 3 DAQ PXI 20XX Layout 13 2 4 PCI Configuration 14 Chapter 3 Signal Connections 15 3 1 Connectors Pin Assignment 15 3 2 Analog Input Signal Connection 18 3 2 1 Types of signal sources...

Страница 5: ...es 45 4 5 Trigger Sources 49 4 5 1 Software Trigger 49 4 5 2 External Analog Trigger 49 4 5 3 External Digital Trigger 53 4 6 User controllable Timing Signals 53 4 6 1 DAQ timing signals 54 4 6 2 Auxi...

Страница 6: ...ut digital code on the DAQ PXI 2005 2006 24 Table 8 Unipolar analog input range and the output digital code on the DAQ PXI 2005 2006 24 Table 9 Bipolar output code table 36 Table 10 Unipolar output co...

Страница 7: ...31 Figure 15 Middle trigger 31 Figure 16 Post trigger 32 Figure 17 Delay trigger 33 Figure 18 Post trigger with re trigger 34 Figure 19 Scatter gather DMA for data transfer 35 Figure 20 Typical D A ti...

Страница 8: ...38 Below Low analog trigger condition 50 Figure 39 Above High analog trigger condition 51 Figure 40 Inside Region analog trigger condition 51 Figure 41 High Hysteresis analog trigger condition 52 Figu...

Страница 9: ...layout of DAQ PXI 20XX including the positions of con nectors the connectors pin assignments are specified Chapter 3 Signal Connections describes the connector of the DAQ PXI 20XX and the signal conne...

Страница 10: ...sition Card provides the fol lowing advanced features 32 bit PCI Bus plug and play 4 channel simultaneous differential analog inputs DAQ PXI 2010 14 bit Analog input resolution with sampling rate up t...

Страница 11: ...delay trigger pre trigger and middle trigger 2 channel DA outputs with waveform generation capability 2K samples output data FIFO for DA channels DA Data transfer software update and bus mastering DMA...

Страница 12: ...te 2010 2MS s 2005 500kS s 2006 250kS s Resolution 2010 14 bits no missing code 2005 2006 16 bits no missing code FIFO buffer size 2010 8K samples 2005 2006 512 samples Programmable input range Bipola...

Страница 13: ...540 kHz 0 2 5V 540 kHz 2006 1 25V 410 kHz 0 1 25V 420 kHz Table 1 3dB small signal bandwidth System Noise Typical Device Input Range System noise Input Range System noise 10V 0 6 LSBrms 0 10V 0 8 LSBr...

Страница 14: ...2 5V 91 dB 2006 1 25V 93 dB 0 1 25V 93 dB Table 3 CMRR DC to 60Hz Time base source Internal 40MHz or External clock Input fmax 40MHz fmin 1MHz 50 duty cycle Trigger modes Post trigger Delay trigger P...

Страница 15: ...med I O and bus mastering DMA with scatter gather Output range Bipolar 10V or AOEXTREF Unipolar 0 10V or 0 AOEXTREF Settling time 3 S to 0 5 LSB accuracy Slew rate 20V uS Output coupling DC Protection...

Страница 16: ...sam pled simultaneously with the analog signal input Compatibility TTL CMOS Input voltage Logic Low VIL 0 8V max IIL 0 2mA max Logic High VIH 2 7V min IIL 0 02mA max General Purpose Timer Counter GPTC...

Страница 17: ...onous Interface SSI Trigger lines 7 Stability Recommended warm up time 15 minutes On board calibration reference Level 5 000V Temperature coefficient 2ppm C Long term stability 6ppm 1000Hr Physical Di...

Страница 18: ...l license 1 4 1 Programming Library For customers who are writing their own programs we provide function libraries for many different operating systems including D2K DASK Include device drivers and DL...

Страница 19: ...ase refer to the user s guide in the CD Manual_PDF Software PCIS OCX PCIS OCX PDF The above software drivers are shipped with the card Please refer to the Software Installation Guide in the package to...

Страница 20: ...n usesoftware utility PCI_SCAN to read the system configuration 2 1 Contents of Package In addition to this User s Guide the package should include the following items DAQ PXI 20XX Multi function Data...

Страница 21: ...damages Shipping and han dling may cause damage to your module Be sure there are no shipping and handling damages on the modules carton before continuing After opening the card module carton extract...

Страница 22: ...Installation 13 2 3 DAQ PXI 20XX Layout Figure 1 PCB Layout of the DAQ 20XX Figure 2 PCB Layout of the PXI 20XX 2005 2006 2010 Daughter Board 2005 2006 2010 Daughter Board...

Страница 23: ...basis for all PCI boards on your system Because configuration is controlled by the system and software there is no jum per setting required for base address DMA and interrupt IRQ The configuration is...

Страница 24: ...connection between the DAQ PXI 20XX and external devices 3 1 Connectors Pin Assignment The DAQ PXI 20XX is equipped with one 68 pin VHDCI type connector AMP 787254 1 It is used for digital input outp...

Страница 25: ...FTRG AI_TRIG_OUT 14 48 EXTDTRIG GPTC1_SRC 15 49 DGND GPTC0_SRC 16 50 DGND GPTC0_GATE 17 51 GPTC1_GATE GPTC0_OUT 18 52 GPTC1_OUT GPTC0_UPDOWN 19 53 GPTC1_UPDOWN EXTTIMEBASE 20 54 DGND AFI1 21 55 AFI0 P...

Страница 26: ...1 _UPDOWN DGND Input Up Down of GPTC 0 1 20 EXTTIMEBASE DGND Input External TIMEBASE 21 28 49 50 54 62 DGND Digital ground 22 56 23 57 24 58 25 59 PB 7 0 DGND PIO Programmable DIO pins of 8255 Port B...

Страница 27: ...th respect to the DAQ PXI 20XX assuming that the computer is plugged into the same power system Non isolated out puts of instruments and devices that plug into the buildings power system are ground re...

Страница 28: ...3 Differential Measurements Differential Connection for Grounded Reference Signal Sources The differential analog input provides two inputs that respond to the signal voltage difference between them...

Страница 29: ...vide a bias return path The resistor value should be about 100 times the equivalent source impedance If the source impedance is less than 100ohms you can simply connect the negative side of the signal...

Страница 30: ...time In the following description to conform to the original timing design we still use scan as the unit of A D data acquisition All the DA and GPTC functions are the same in DAQ PXI 20XX and DAQ PXI...

Страница 31: ...a FIFO as shown in Figure 7 and Figure 8 Therefore users can simultaneously sample one analog signal with four digital signals The data format of every acquired 16 bit data is as follows D13 D12 D11 D...

Страница 32: ...n Bipolar Analog Input Range Digital code Full scale Range 10V 5V 2 5V 1 25V Least significant bit 1 22mV 0 61mV 0 305mV 0 153mV FSR 1LSB 9 9988V 4 9994V 2 4997V 1 2499V 1FFF Midscale 1LSB 1 22mV 0 61...

Страница 33: ...2V FFFF Midscale 1LSB 305 2uV 152 6uV 76 3uV 38 15uV 8001 Midscale 0V 0V 0V 0V 8000 Midscale 1LSB 305 2uV 152 6uV 76 3uV 38 15uV 7FFF FSR 10V 5V 2 5V 1 25V 0000 Table 7 Bipolar analog input range and...

Страница 34: ...olled under software However it is difficult to control the A D con version rate 4 1 3 1 Specifying Channel Gain and Polarity In both the Software Polling and programmable scan acquisition mode the ch...

Страница 35: ...X series is a simultaneous sampling A D card so the scan interval equals to the sampling interval Example Post trigger acquisition Set SI_counter 160 PSC_counter 30 TIMEBASE Internal clock source Then...

Страница 36: ...minimum setting of SI_counter is 20 for DAQ PXI 2010 80 for DAQ PXI 2005 and 160 for DAQ PXI 2006 while using the internal TIMEBASE 2 The SI_counter is a 24 bit counter Therefore the maximum scan in t...

Страница 37: ...of the stored scans before the trigger event If an external trigger occurs the program only stores the last M scans of data converted before the trigger event as illustrated in figure 10 where M_count...

Страница 38: ...12 This situation can be avoided by setting M_enable If M_enable is set to 1 the trigger signal will be ignored until the first M scans of data are converted and it assures the user M scans of data u...

Страница 39: ...umber of scans M stored before the trigger is specified in M_counter while the number of scans N after the trigger is specified in PSC_counter Like pre trigger mode the number of stored data could be...

Страница 40: ...Scan Count 1 0 Figure 14 Middle trigger with M_enable 1 If the trigger event occurs when a scan is in progress the stored N scans of data would include this scan as illustrated in Fig 15 M_Counter M...

Страница 41: ...3 Acquisition_in_progress Scan_start ADCONV Acquired stored data 3 scans Operation start Trigger Post Scan Count 3 2 1 0 Figure 16 Post trigger Delay Trigger Acquisition Use delay trigger acquisition...

Страница 42: ...trigger acquisition with re trigger function in ap plications where you want to collect data after several trigger events The number of scans after each trigger is specified in PSC_counter and users...

Страница 43: ...and then transfers the data to a user defined DMA buffer memory in the computer Please note that even when the acquired data length is less than the Data FIFO the AD data will not be kept in the Data...

Страница 44: ...is constructed by three DMA descriptors Each descriptor contains a PCI address a local address a transfer size and the pointer to the next descriptor Users can allocate many small size memory blocks a...

Страница 45: ...the unipolar output mode While using an external reference users can reach different output ranges by connecting different references For example if connecting a DC 5V with the external reference then...

Страница 46: ...update the digital values into D A data registers through a software output command 4 2 2 Timed Waveform Generation This mode can provide your applications with a precise D A output with a fixed upda...

Страница 47: ...are 2V 4V 4V 0V Note 1 The maximum D A update rate is 1MHz Therefore the minimum setting of the UI_counter is 40 while using an internal TIMEBASE 40MHz 4 2 2 1 Trigger Modes Post Trigger Generation U...

Страница 48: ...r counts down on the rising edge of its clock source after the trigger condition is met When the count reaches 0 the counter stops and the DAQ PXI 20XX starts the waveform generation This DLY1_Counter...

Страница 49: ...IC_Counter in order to generate iterative waveforms from the data of a single waveform The counter stores the iteration number and the itera tions can be finite Figure 24 or infinite Figure 25 A data...

Страница 50: ...Trigger Output Waveform waveform generation won t stop until software stop function is executed 0 2 4 Figure 25 Infinite iterative waveform generation with Post trigger and DLY2_Counter 0 Assuming the...

Страница 51: ...tion which means when it is to stop the waveform generation You can apply these 3 modes to stop waveform generation no matter infinite or finite waveform generation mode is selected Figure 26 illustra...

Страница 52: ...ing the data in the data buffer are 2V 4V 2V 0V UC _Counter 4 IC_Counter 3 4 update counts infinite iterations DAWR WFG_in_progress Operation start Trigger Output Waveform 0 2 4 Software stop command...

Страница 53: ...Programmable counter clock source internal or external clock up to 10MHz Programmable gate selection hardware or software control Programmable input and output signal polarities high active or low act...

Страница 54: ...ulses on the GPTC_CLK after the software start Initial count can be loaded from software Current count value can be read back by software any time without affecting the counting GPTC_GATE is used to e...

Страница 55: ...then current count value can be read back by software Figure 31 illustrates the operation where initial count 0 count upmode 0 0 1 2 3 4 5 5 5 Gate CLK Count value Software start Figure 31 Mode 3 Oper...

Страница 56: ...is re executed Figure 33 illustrates the generation of a single pulse with a pulse delay of two and a pulse width of four 2 2 1 0 3 2 1 0 Gate CLK Count value OUT Software start Figure 33 Mode 5 Opera...

Страница 57: ...igure 35 illustrates the generation of two pulses with a pulse delay of four and a pulse width of three 4 4 4 3 2 1 0 2 1 Software start 0 3 2 1 0 2 1 0 3 2 Gate CLK Count value OUT Figure 35 Mode 7 O...

Страница 58: ...n in the figure 37 The analog multiplexer can select either a direct analog input from the EXTATRIG pin SRC1 in figure 37 in the 68 pin connector or the input signal of ADC SRC2 in figure 37 That is o...

Страница 59: ...in the DAQ PXI 20XX The DAQ PXI 20XX uses 2 threshold voltages Low_Threshold and High_Threshold to build the 5 different trigger conditions Users could configure the trigger conditions easily by softw...

Страница 60: ...tage and the Low_Threshold setting is not used in this trigger condition Figure 39 Above High analog trigger condition 4 5 2 3 Inside Region analog trigger condition Figure 40 shows the inside region...

Страница 61: ...the Low_Threshold voltage determines the hysteresis duration Figure 41 High Hysteresis analog trigger condition 4 5 2 5 Low Hysteresis analog trigger condition Figure 42 shows the low hysteresis anal...

Страница 62: ...nchronizing multiple cards the DAQ PXI 20XX series provides flexible user controllable timing signals to connect to external circuitry or additional cards The whole DAQ timing of the DAQ PXI 20XX seri...

Страница 63: ...timing signals AI_Trig_Out AO_Trig_Out Control external circuitry or boards Table 12 Summary of user controllable timing signals and the corresponding functionalities 4 6 1 DAQ timing signals The user...

Страница 64: ...r signal for the D A operation which could be derived from external digital trigger analog trigger internal software trigger and SSI_AD_TRIG Refer to Section 4 5 for detailed d e scription 6 DAWR the...

Страница 65: ...0ns 3 Rising edge or falling edge Replace the internal ADCONV 1 TTL compatible 2 Minimum pulse width 20ns 3 Rising edge sensitive only AFI 0 Dual functions Replace the internal SCAN_START 1 TTL compat...

Страница 66: ...r A D operations Please refer to sections 4 1 and 4 6 1 for detailed descriptions of the SCAN_START signal When using external signal AFI 0 to replace the internal SCAN_START signal the pulse width of...

Страница 67: ...or slave In PCI form factor there is a connector on the top right corner of the card for the SSI Refer to section 2 3 for the connector position All the SSI sig nals are routed to the 20 pin connector...

Страница 68: ...rd 2 3 4 to be the slaves c Set external digital trigger for Card 1 s A D operation d Set the SI_counter and the post scan counter PSC of all other cards e Start DMA operations for all cards thus all...

Страница 69: ...at is AI_Trig_Out follows the A D trigger source and AO_Trig_Out follows the D A trigger source These two sig nals can be used to control external peripheral circuits or boards or can be used as synch...

Страница 70: ...oading the values of TrimDACs stored in the on board EEPROM ADLINK provides software to make it easy to read the calibration constants automatically when neces sary There is a dedicated space for cali...

Страница 71: ...to adjust the on board calibration reference except when an ultra precision cali brator is available Note 1 Before auto calibration procedure starts it is recommended to warn up the card for at least...

Страница 72: ...Local warranty conditions will depend on the local dealers 3 Our repair service does not cover the two year warranty if the fol lowing items cause damages a Damage caused by not following instructions...

Страница 73: ...www adlinktech com Damaged products with RMA forms attached receive priority For further questions please contact our FAE staff ADLINK service adlinktech com Test Measurement Product Segment NuDAQ adl...

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