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XVME-6500

USER

’S MANUAL

Acromag, Inc. Tel: 248-295-0310

- 45 -

http://www.acromag.com

- 45 -

www.acromag.com

6.2.4 VME Interface

6.2.4.1 P0 VME Connector (Optional)

This optional connector is a standard 6-row, 2mm Type B, 95-pin Harting 17-25-095-2102. It contains 2
Ethernet and the Lower Site's PMC I/O (XMC instead with build option)

ROW/PIN

GND

ENET0_MX0_P

ENET0_MX0_N

GND

ENET0_MX2_P

ENET0_MX2_N

ENET0_MX1_P

ENET0_MX1_N

GND

ENET0_MX3_P

ENET0_MX3_N

GND

ENET1_MX0_P

ENET1_MX0_N

GND

ENET1_MX2_P

ENET1_MX2_N

ENET1_MX1_P

ENET1_MX1_N

GND

ENET1_MX3_P

ENET1_MX3_N

GND

ENET1_LINK#

ENET0_LINK#

+3.3V_TO_RTM

ENET1_ACT#

ENET0_ACT#

LWR_IO0_P

LWR_IO2_P

LWR_IO2_N

LWR_IO3_P

LWR_IO3_N

GND

LWR_IO0_N

LWR_IO4_P

LWR_IO4_N

LWR_IO5_P

LWR_IO5_N

LWR_IO8_P

LWR_IO6_P

LWR_IO6_N

LWR_IO7_P

LWR_IO7_N

GND

LWR_IO8_N

LWR_IO1_P

LWR_IO1_N

LWR_IO9_P

LWR_IO9_N

LWR_IO12_P

LWR_IO10_P

LWR_IO10_N

LWR_IO11_P

LWR_IO11_N

GND

LWR_IO12_N

LWR_IO25_N

LWR_IO25_P

LWR_IO13_P

LWR_IO13_N

LWR_IO16_P

LWR_IO14_P

LWR_IO14_N

LWR_IO15_P

LWR_IO15_N

GND

LWR_IO16_N

LWR_IO31_N

LWR_IO31_P

LWR_IO17_P

LWR_IO17_N

LWR_IO20_P

LWR_IO18_P

LWR_IO18_N

LWR_IO19_P

LWR_IO19_N

GND

LWR_IO20_N

LWR_IO29_N

LWR_IO29_P

LWR_IO21_P

LWR_IO21_N

LWR_IO24_P

LWR_IO22_P

LWR_IO22_N

LWR_IO23_P

LWR_IO23_N

GND

LWR_IO24_N

LWR_IO26_N

LWR_IO26_P

LWR_IO27_N

LWR_IO27_P

LWR_IO30_N

LWR_IO30_P

LWR_IO28_N

LWR_IO28_P

GND

NC = NO CONNECT

ENET1 signals may instead be switched to XBRD-9060 I/O Expander module, if installed.

Содержание XVME-6500

Страница 1: ...Ebus CPU Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road Wixom MI 48393 2417 U S A Tel 248 295 0310 Fax 248 624 9234 Copyright 2015 Acromag Inc Printed in the USA Data and specificati...

Страница 2: ...hipset Lynx Point PCH 11 1 6 3 Intel 82580EB Quad Ethernet Controller 11 1 6 4 Nuvoton NCT6106D Super I O 12 1 6 5 Atmel AT97SC3204 TPM 12 1 6 6 FPGA based VME to PCI Express Bridge 12 1 6 7 Expansion...

Страница 3: ...6 1 VGA 26 3 6 2 Digital Display Interfaces 26 3 6 2 1 DVI 27 3 6 2 2 HDMI 27 3 6 2 3 Integrated Audio 27 3 6 3 Configuring the Primary Display 28 3 6 4 Configuring the Video Memory 28 3 6 5 Video Di...

Страница 4: ...tling Hardware Controlled 35 3 14 2 2 Thermal Management OSPM Controlled 35 3 14 3 Memory Throttling 35 3 14 4 Thermal Management Hardware 35 3 15 Watchdog 36 3 16 Expansion Sites 36 3 16 1 XMC Module...

Страница 5: ...er XMC Site Rear I O Connector 54 6 2 6 Upper PMC XMC Site 55 6 2 6 1 J21 Upper PMC Site PCI X Connector 55 6 2 6 2 J22 Upper PMC Site PCI X Connector 56 6 2 6 3 J23 Upper PMC Site PCI X Connector 57...

Страница 6: ...nector 73 7 5 2 6 J5 USB 2 0 Connector 73 7 5 2 7 J1 mSATA Connector 74 7 5 2 8 J6 mSATA Connector 75 7 6 Power Requirements 76 7 7 Environmental Considerations 76 7 8 XBRD 9060 Certificate of Volatil...

Страница 7: ...8 4 2 9 P4 Lower PMC XMC User I O Connector Optional 86 8 4 2 10 P2 RS 232 RS 485 Serial Port 86 8 4 2 11 P3 Lower PMC XMC User I O Connector Optional 87 8 4 2 13 J6 mSATA Connector 88 8 4 2 14 J2 mSA...

Страница 8: ...t the information contained in this manual No part of this manual may be copied or reproduced in any form without the prior written consent of Acromag 1 2 1 Trademark Trade Name and Copyright Informat...

Страница 9: ...connector the P0 connector can instead carry I O from the XMC module s P6 connector An option is also available to have the P2 connector s I O compatible with the XVME 6300 by giving up some of the PM...

Страница 10: ...ts 8501026 Intel document No 328901 Mobile 4th Generation Intel Core Processor Family Datasheet Volume 1 of 2 Rev 002 September 2013 http www intel com content www us en processors core CoreT echnical...

Страница 11: ...he QM87 Platform Control Hub PCH DDR3L SDRAM Two SODIMM sockets support up to 16GB of DDR3L ECC at 1600MHz Dual channel mode is used with the two SODIMMs The SODIMMs are attached to the module firmly...

Страница 12: ...function at USB 2 0 or USB 1 1 speeds There are an additional two ports available on the Expansion Site connector for the optional XBRD 9060 VGA An analog VGA port is available including DDC clock an...

Страница 13: ...the SHA 1 accelerator is 20 s per 64 byte block 1 6 6 FPGA based VME to PCI Express Bridge The FPGA based VME to PCIe bridge is a full VME64x Master Slave interface with slot 1 functions and interrupt...

Страница 14: ...near strong electrostatic electromagnetic magnetic or radioactive fields unless the device is contained within its original manufacturer s packaging Be aware that failure to comply with these guideli...

Страница 15: ...G Never install or remove any boards before turning off power to the bus and all related external power supplies 1 Disconnect all power supplies to the backplane and the card cage Disconnect the power...

Страница 16: ...XVME 6500 USER S MANUAL Acromag Inc Tel 248 295 0310 15 http www acromag com 15 www acromag com 3 0 HARDWARE INFORMATION AND CONFIGURATION Fig 3 1 a XVME 6500 Top View...

Страница 17: ...Operation ON Restore BIOS Defaults 4 Onboard 3 3V Regulator OFF Auto Enable Onboard 3 3V Regulator if Not on Backplane ON default Force Onboard 3 3V Regulator On SW1 1 is used to configure whether the...

Страница 18: ...MC bus speed When the switch is on the bus speed is automatically selected at 133 66 33MHz When the switch is off the speed is overridden as follows 133MHz normal bus speed will slow down to 100MHz 66...

Страница 19: ...generate a VME SYSRESETn assertion on VME backplane ON by default 7 SPI_WR_ PROT Enable Write Protect for SPI Flash EEPROM configuration ON by default 8 SPI_CFG_ ENA Enable SPI Flash EEPROM configurat...

Страница 20: ...e SPI flash write protest and SPI programming enable signals The SPI flash contains the firmware for the FPGA therefore these two signals should always be kept enabled unless stated otherwise in Acrom...

Страница 21: ...Sw 3 Sw 4 OFF OFF OFF Not Enabled ON OFF OFF 64 Mbytes default OFF ON OFF 128 MBytes ON ON OFF 256 Mbytes OFF OFF ON 512 Mbytes ON OFF ON 1024 Mbytes OFF ON ON 2048 Mbytes ON ON ON 4096 MBytes 5 7 PC...

Страница 22: ...0 can be used in any of the following VMEbus systems with the associated caveats 3 row 5V only legacy system This system will limit the P2 I O and the incoming power to the XVME 6500 to 60W The DVI D...

Страница 23: ...the programmed limit could be exceeded Extremely large workloads have a realistic minimum power of around 20W However light to medium workloads can effectively maintain a power limit as low as 5 10W...

Страница 24: ...C modules More details about programming these power limits using the BIOS setup utility are provided in The Acromag Core BIOS Manual 3 2 3 Power Management The XVME 6500 module uses the Advanced Conf...

Страница 25: ...the BIOS setup the CPU can be used in applications where less power is available or heat removal is an issue This is accomplished by the CPU automatically underclocking its frequency to maintain a pow...

Страница 26: ...o SATA ports that operate up to 3Gb sec connected to the VME P2 connector SATA III 2 There are two SATA ports that operate up to 6Gb sec connected to the Expansion Site connector for the optional XBRD...

Страница 27: ...roller to support the analog VGA interface The VGA interface features include Integrated 180 Mhz 24 bit RAMDAC Support for analog monitor resolutions up to 1920x2000 60 Hz The VGA port is available on...

Страница 28: ...a and all standard and high definition consumer electronics video formats The HDMI display interface connecting the processor and display devices uses transition minimized differential signaling TMDS...

Страница 29: ...IOS Manual For Acromag Products 3 6 5 Video Display Options The XVME 6500 supports simultaneous independent displays on the VGA and DVI D ports Display mode choices when using multiple monitors includ...

Страница 30: ...4 DIMMB Temp 0xA0 ID EEPROM 0xA2 DIMMA SPD 0xA4 DIMMB SPD 0xA8 Lower XMC Site 0xAA Upper XMC Site 3 9 2 Low Pin Count LPC The LPC interface contains the onboard NCT6776D Super I O device which supplie...

Страница 31: ...oth ports share 1A of available power PCH USB 2 0 Ports 2 and 3 are routed to the optional XBRD 9060 PCH USB 2 0 Ports 8 9 are routed to the VME P2 connector Both ports share 1A of available power For...

Страница 32: ...battery Note If the battery has been removed the RTC voltage drops below 2 5V or when a BIOS update has been done the first time the system is powered on it may partially boot and then restart up to t...

Страница 33: ...used by this processor enables very high performance while also meeting power conservation needs When EIST is enabled the clock frequency of the CPU is dynamically changed in response to the CPU load...

Страница 34: ...e and current limits The Intel Turbo Boost Technology feature is designed to increase performance of both multi threaded and single threaded workloads The processor supports a Turbo mode in which the...

Страница 35: ...ore BIOS Manual For Acromag Products 3 13 7 Intel Matrix Storage Technology Intel Matrix Storage Technology is supported by Intel s 8 Series QM87 Lynx Point PCH which provides AHCI functionality RAID...

Страница 36: ...ned off within 500ms to prevent permanent silicon damage 3 14 2 2 Thermal Management OSPM Controlled In addition to the hardware throttling described above software controlled passive trip points may...

Страница 37: ...module s P6 connector to the XVME 6500 s P0 connector Please consult factory regarding this option The Upper Site accepts PMC or XMC modules with the module s P4 user I O routed as 100ohm differential...

Страница 38: ...uses PCI X and can function at 133MHz 100MHz 66MHz or 50MHz bus speeds SW2 1 may be used to select a maximum bus speed or allow it to be automatic based on the PMC card s installed Note The VITA 39 Sp...

Страница 39: ...or extra speed is desired 3 16 5 Power Available to Expansion Modules The power requirements given in Section 6 4 do not include attached expansion modules The amount of power available to the expansi...

Страница 40: ...5W 4 0W Care must be taken in this situation Since this value is much less than 20W only very small workloads on the CPU will keep the power at this limit The expected expansion card power is still li...

Страница 41: ...uration options see Sections 3 1 3 3 1 5 and 3 1 6 Five VME Bridge LEDs are provided for visual indication of the bus status for quick debugging The LEDs are described below in Table 3 17 a Table 3 17...

Страница 42: ...L LED will be turned off When the BIOS completes the POST the green PASS LED is turned on USER LEDs The USER LEDs are accessible by user software See Section 4 for more information ETHERNET LINK ACTIV...

Страница 43: ...6300 Compatible I O build option The default output levels of the front panel User LEDs can be configured The LED is on when the output level is high The serial protocol used by COM4 and COM2 can be e...

Страница 44: ...l of the procedures in the Preparation for Use section have been followed Also refer to the documentation for the module to verify that it is correctly configured Replacement of the module with one th...

Страница 45: ...ctor 6 2 2 J6 SPI BIOS Programming Header 6 2 3 J17 FPGA based VME Bridge Programming Header This connector is a 26 pin Molex 52435 2671 and complies with Intel Shark Bay Debug Port Design Guide It ca...

Страница 46: ...7 LWR_IO0_P LWR_IO2_P LWR_IO2_N LWR_IO3_P LWR_IO3_N GND 8 LWR_IO0_N LWR_IO4_P LWR_IO4_N LWR_IO5_P LWR_IO5_N 9 LWR_IO8_P LWR_IO6_P LWR_IO6_N LWR_IO7_P LWR_IO7_N GND 10 LWR_IO8_N LWR_IO1_P LWR_IO1_N LWR...

Страница 47: ...SYSCLK BG3IN SYSFAIL GA0 11 NC GND BG3OUT BERR GA1 12 GND DS1 BR0 SYSRESET 3 3V1 13 NC DS0 BR1 LWORD GA2 14 GND WRITE BR2 AM5 3 3V1 15 NC GND BR3 A23 GA3 16 GND DTACK AM0 A22 3 3V1 17 NC GND AM1 A21 G...

Страница 48: ...CLK_N 12 GND UPR_IO24_N GND VGA_VSYNC GND 13 UPR_IO3_P USB_P4_P 5V VGA_HSYNC DVI_HPD 14 GND USB_P4_N VME_D16 UPR_IO18_N DVI_SDA 15 UPR_IO3_N UPR_IO25_P VME_D17 VGA_I2C_DAT DVI_SCL 16 GND USB_P5_P VME_...

Страница 49: ...those on the XVME 6300 The highlighted pins below show the pin differences from the standard XVME 6500 I O ROW PIN A C D 6 GND NC 7 NC 8 GND 9 GND 12 GND 14 GND 15 GND 16 GND 17 GND NC 18 GND NC 19 N...

Страница 50: ...D INTB 4 5 INTC INTD 6 7 NC 5V 8 9 INTA NC 10 11 GND NC 12 13 CLK_PCI GND 14 15 GND GNT1 16 17 REQ 5V 18 19 3 3V AD 31 20 21 AD 28 AD 27 22 23 AD 25 GND 24 25 GND C BE 3 26 27 AD 22 AD 21 28 29 AD 19...

Страница 51: ...JTAG_TDI GND 6 7 GND NC 8 9 NC NC 10 11 PU to 3 3V 3 3V 12 13 RST GND 14 15 3 3V GND 16 17 NC GND 18 19 AD 30 AD 29 20 21 GND AD 26 22 23 AD 24 3 3V 24 25 AD 22 IDSEL AD 23 26 27 3 3V AD 20 28 29 AD...

Страница 52: ...BE 5 6 7 C BE 4 GND 8 9 3 3V PAR64 10 11 AD 63 AD 62 12 13 AD 61 GND 14 15 GND AD 60 16 17 AD 59 AD 58 18 19 AD 57 GND 20 21 3 3V AD 56 22 23 AD 55 AD 54 24 25 AD 53 GND 26 27 GND AD 52 28 29 AD 51 A...

Страница 53: ...WR_IO5_N 12 13 LWR_IO6_P LWR_IO7_P 14 15 LWR_IO6_N LWR_IO7_N 16 17 LWR_IO8_P LWR_IO9_P 18 19 LWR_IO8_N LWR_IO9_N 20 21 LWR_IO10_P LWR_IO11_P 22 23 LWR_IO10_N LWR_IO11_N 24 25 LWR_IO12_P LWR_IO13_P 26...

Страница 54: ...MS GND GND 12V 7 PEG6_RX_P PEG6_RX_N 3 3V PEG7_RX_P PEG7_RX_N 5V 8 GND GND JTAG_TDI GND GND 12V 9 NC NC NC NC NC 5V 10 GND GND JTAG_TDO GND GND GND GA0 11 PEG0_TX_P PEG0_TX_N NC PEG1_TX_P PEG1_TX_N 5V...

Страница 55: ...R_IO4_P LWR_IO4_N NC LWR_IO5_P LWR_IO5_N NC 6 GND GND NC GND GND NC 7 LWR_IO6_P LWR_IO6_N NC LWR_IO7_P LWR_IO7_N NC 8 GND GND LWR_IO30_N GND GND LWR_IO31_N 9 LWR_IO8_P LWR_IO8_N LWR_IO30_P LWR_IO9_P L...

Страница 56: ...D INTD 4 5 INTA INTB 6 7 NC 5V 8 9 INTC NC 10 11 GND NC 12 13 CLK_PCI GND 14 15 GND GNT1 16 17 REQ 5V 18 19 3 3V AD 31 20 21 AD 28 AD 27 22 23 AD 25 GND 24 25 GND C BE 3 26 27 AD 22 AD 21 28 29 AD 19...

Страница 57: ...JTAG_TDI GND 6 7 GND NC 8 9 NC NC 10 11 PU to 3 3V 3 3V 12 13 RST GND 14 15 3 3V GND 16 17 NC GND 18 19 AD 30 AD 29 20 21 GND AD 26 22 23 AD 24 3 3V 24 25 AD 23 IDSEL AD 23 26 27 3 3V AD 20 28 29 AD...

Страница 58: ...BE 5 6 7 C BE 4 GND 8 9 3 3V PAR64 10 11 AD 63 AD 62 12 13 AD 61 GND 14 15 GND AD 60 16 17 AD 59 AD 58 18 19 AD 57 GND 20 21 3 3V AD 56 22 23 AD 55 AD 54 24 25 AD 53 GND 26 27 GND AD 52 28 29 AD 51 A...

Страница 59: ...5_N 12 13 UPR_IO6_P UPR_IO7_P 14 15 UPR_IO6_N UPR_IO7_N 16 17 UPR_IO8_P UPR_IO9_P 18 19 UPR_IO8_N UPR_IO9_N 20 21 UPR_IO10_P UPR_IO11_P 22 23 UPR_IO10_N UPR_IO11_N 24 25 UPR_IO12_P UPR_IO13_P 26 27 UP...

Страница 60: ..._P PEG15_RX_N 5V 8 GND GND JTAG_TDI GND GND 12V 9 NC NC NC NC NC 5V 10 GND GND JTAG_TDO GND GND GND GA0 11 PEG0_TX_P PEG0_TX_N NC PEG1_TX_P PEG1_TX_N 5V 12 GND GND GND GA1 GND GND XMC_SEL 13 PEG2_TX_P...

Страница 61: ...ATA1_TX_N SATA0_TX_N 14 15 SATA1_TX_P SATA0_TX_P 16 17 GND GND 18 19 SATA1_RX_N SATA0_RX_N 20 21 SATA1_RX_P SATA0_RX_P 22 23 GND GND 24 25 Reserved Reserved 26 27 Reserved Reserved 28 29 GND GND 30 31...

Страница 62: ...can be accessed through standard connectors by using the supplied shielded dongle cable P N 4001128 Note The DB 9 serial connector on this dongle cable is wired as a DTE port PIN SIGNAL 1 GND 2 USB0_...

Страница 63: ...cables of various lengths with RJ Point 5 connectors on one end and standard RJ 45 connectors on the other are available from TE and Stewart Connector PIN SIGNAL 1A ENET2_MX0_P 2A ENET2_MX0_N 3A ENET...

Страница 64: ...CRT_REAR_RED CRT_REAR_GREEN and CRT_REAR_BLUE signals Failure to apply this termination may result in poor display quality and improper operation of Intel HD Graphics control panel in Windows Also fo...

Страница 65: ...anes that do not supply 3 3V add 2 5W to the above 5V values 3 3VDC 5 2 when the backplane supplies 3 3V All configurationsS0 Idle1 2 5W S0 Max2 2 6W S0 Typ3 2 5W 1 S0 Idle was measured with module op...

Страница 66: ...and can handle the XVME 6500 consuming an extra slot a larger heatsink is available as an accessory Consult factory for more information WARNING If airflow is not adequate throttling can reach maximu...

Страница 67: ...romag com 6 6 Reliability Prediction Table 6 6 a MTBF MTBF Mean Time Between Failure MTBF in hours using MIL HDBK 217F FN2 Per MIL HDBK 217 Ground Benign Controlled GBGC Temperature MTBF Hours MTBF Ye...

Страница 68: ...ttery BT1 from socket Non Volatile Memory Does this product contain Non Volatile memory i e Memory of whose contents is retained when power is removed Yes No Type EEPROM Flash etc Flash Qtty 2 Size 16...

Страница 69: ...ernet ports on the P0 connector is disabled One RS 232 serial port This port only contains TX RX signals It is brought out on a mini USB B connector but an adapter cable is included with the module fo...

Страница 70: ...6500 s P0 connector SW1 4 6 is used to configure the isolation of the Front Panel ORB GND 7 3 mSATA Module Installation One or two full size 51mm mSATA modules may be installed by using the screws pro...

Страница 71: ...310 70 http www acromag com 70 www acromag com 7 5 Specifications 7 5 1 Physical The XBRD 9060 dimensions are shown below Length 128 0 mm 5 039 in Width 74 0 mm 2 913 in Height from XVME 6500 includes...

Страница 72: ...12 13 SATA1_TX_N SATA0_TX_N 14 15 SATA1_TX_P SATA0_TX_P 16 17 GND GND 18 19 SATA1_RX_N SATA0_RX_N 20 21 SATA1_RX_P SATA0_RX_P 22 23 GND GND 24 25 Reserved Reserved 26 27 Reserved Reserved 28 29 GND GN...

Страница 73: ...ions LIINK and ACTIVITY LEDs are built in to the connector PIN SIGNAL 1 ENET1_MX_P1 2 ENET1_MX_N1 3 ENET1_MX1_P1 4 ENET1_MX2_P1 5 ENET1_MX2_N1 6 ENET1_MX1_N1 7 ENET1_MX3_P1 8 ENET1_MX3_N1 1 ENET1 sign...

Страница 74: ...or it will only function at USB 2 0 or lower speeds There is no USB 3 0 superspeed signal connection PIN SIGNAL 1 5V USB POWER 2 USB2_N 3 USB2_P 4 GND 5 NC 6 NC 7 GND 8 NC 9 NC This 9 pin USB 3 0 A st...

Страница 75: ...BRD 9060 PIN SIGNAL SIGNAL PIN 1 NC 3 3V 2 3 NC GND 4 5 NC 1 5V 6 7 NC NC 8 9 GND NC 10 11 NC NC 12 13 NC NC 14 15 GND NC 16 17 NC GND 18 19 NC NC 20 21 GND PLT_RST 22 23 SATA0_RX_N 3 3V 24 25 SATA0_R...

Страница 76: ...BRD 9060 PIN SIGNAL SIGNAL PIN 1 NC 3 3V 2 3 NC GND 4 5 NC 1 5V 6 7 NC NC 8 9 GND NC 10 11 NC NC 12 13 NC NC 14 15 GND NC 16 17 NC GND 18 19 NC NC 20 21 GND PLT_RST 22 23 SATA1_RX_N 3 3V 24 25 SATA1_R...

Страница 77: ...ommercial grade mSATA modules are normally rated 0 C to 70 C Designed to comply with the following Relative Humidity 5 to 95 Non condensing Storage Temperature 55 C to 100 C Shock Non Operating 50g pe...

Страница 78: ...ype SRAM SDRAM etc none Size User Modifiable Yes No Function Process to Sanitize Non Volatile Memory Does this product contain Non Volatile memory i e Memory of whose contents is retained when power i...

Страница 79: ...CSI 3 connector The following I O is available via internal connectors on the XVME 9640 Stereo Audio Line In Line Out are available via a 5 pin connector One software selectable RS 232 RS 485 serial p...

Страница 80: ...ttings and descriptions for dip switch SW1 Table 8 2 1 a XVME 9640 Configuration Switch SW1 Configuration Switch SW1 Position Function Switch Setting Description 1 Not Used 2 Not Used 3 Not Used 4 ORB...

Страница 81: ..._N1 5 ENET1_MX1_P1 ENET1_MX1_N1 GND ENET1_MX3_P1 ENET1_MX3_N1 GND 6 ENET1_LINK ENET0_LINK 3 3V_FROM_CPU ENET1_ACT ENET0_ACT 7 LWR_IO0_P LWR_IO2_P LWR_IO2_N LWR_IO3_P LWR_IO3_N GND 8 LWR_IO0_N LWR_IO4_...

Страница 82: ...E DVI_CLK_N 12 GND UPR_IO24_N GND VGA_VSYNC GND 13 UPR_IO3_P USB_P4_P 5V VGA_HSYNC DVI_HPD 14 GND USB_P4_N NC UPR_IO18_N DVI_SDA 15 UPR_IO3_N UPR_IO25_P NC VGA_I2C_DAT DVI_SCL 16 GND USB_P5_P NC VGA_I...

Страница 83: ...C 5 GND 6 GND_RED 7 GND_GREEN 8 GND_BLUE 9 5V VGA 1A MAX 10 GND 11 NC 12 VGA_I2C_DAT 13 VGA_HSYNC 14 VGA_VSYNC 15 VGA_I2C_CLK NC NO CONNECT This 4 pin USB 2 0 A style Molex 67329 8001 connector Brings...

Страница 84: ...nt panel Only the digital signals are available on this connector It can be used simultaneously with the VGA connector PIN SIGNAL 1 DVI_P2_N 2 DVI_P2_P 3 GND 4 NC 5 NC 6 DVI_I2C_CLK 7 DVI_I2C_DAT 8 NC...

Страница 85: ...lied adapter cables Note Patch cables of various lengths with RJ Point 5 connectors on one end and standard RJ 45 connectors on the other are available from TE and Stewart Connector PIN SIGNAL 1A ENET...

Страница 86: ...UPR_IO8_P UPR_IO8_N 43 10 UPR_IO9_P UPR_IO9_N 44 11 UPR_IO10_P UPR_IO10_N 45 12 GND GND 46 13 UPR_IO11_P UPR_IO11_N 47 14 UPR_IO12_P UPR_IO12_N 48 15 UPR_IO13_P UPR_IO13_N 49 16 UPR_IO14_P UPR_IO14_N...

Страница 87: ...O13_P 14 15 UPR_IO3_N UPR_IO13_N 16 17 UPR_IO8_P UPR_IO9_P 18 19 UPR_IO8_N UPR_IO9_N 20 21 UPR_IO20_P UPR_IO21_P 22 23 UPR_IO20_N UPR_IO21_N 24 25 UPR_IO22_P UPR_IO23_P 26 27 UPR_IO22_N UPR_IO23_N 28...

Страница 88: ...7 UPR_IO5_N UPR_IO15_N 8 9 UPR_IO6_P UPR_IO16_P 10 11 UPR_IO6_N UPR_IO16_N 12 13 UPR_IO7_P UPR_IO17_P 14 15 UPR_IO7_N UPR_IO17_N 16 17 UPR_IO18_P UPR_IO19_P 18 19 UPR_IO18_N UPR_IO19_N 20 21 UPR_IO30...

Страница 89: ...ule to the XBRD 9060 PIN SIGNAL SIGNAL PIN 1 NC 3 3V 2 3 NC GND 4 5 NC NC 6 7 NC NC 8 9 GND NC 10 11 NC NC 12 13 NC NC 14 15 GND NC 16 17 NC GND 18 19 NC NC 20 21 GND NC 22 23 SATA2_RX_N 3 3V 24 25 SA...

Страница 90: ...ule to the XBRD 9060 PIN SIGNAL SIGNAL PIN 1 NC 3 3V 2 3 NC GND 4 5 NC NC 6 7 NC NC 8 9 GND NC 10 11 NC NC 12 13 NC NC 14 15 GND NC 16 17 NC GND 18 19 NC NC 20 21 GND NC 22 23 SATA3_RX_N 3 3V 24 25 SA...

Страница 91: ...0 000Hz each axis MIL STD 202G Method 214A EMC Directives The XVME 9640 RTM complies with EMC Directive 2014 30 EU with the exception of DVI Immunity per EN 61000 6 2 Electrostatic Discharge Immunity...

Страница 92: ...Type SRAM SDRAM etc none Size User Modifiable Yes No Function Process to Sanitize Non Volatile Memory Does this product contain Non Volatile memory i e Memory of whose contents is retained when power...

Страница 93: ...default SSD write protect settings from hardware to software 27 JAN 2017 C BLD DAG ARP Changed the name of the referenced BIOS manual to The APTIO Haswell Core BIOS Manual For Acromag Products Update...

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