XVME-6500
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 8 -
http://www.acromag.com
- 8 -
www.acromag.com
1.3 Product Summary
The XVME-6500 is a CPU module that uses an Intel
®
4
th
Generation Core
Processor (Haswell) 6U VME64x VMEbus form factor. It is available in an air-
cooled model only. An extended temperature air-cooled model is also
available for operating in a -40°C to +75°C range.
The standard module has two DDR3L ECC SODIMMs, for a total of 16GB of
DDR3 memory. The standard model The SODIMMs are firmly attached to the
module with screws and surrounded by heat sink material to provide a
mechanically and thermally robust mechanism.
A large amount of I/O is available, as summarized
in the “Key Features
and
Benefits
” section below.
There are two PMC/XMC sites available on the module. These can be used
as 2 XMC, 2 PMC, or one of each type. All 64 pins of rear I/O from the
PMC/XMC module's P4 connector are routed to the XVME-6500's P0 and P2
connectors. Note the P0 connector is optional and also carries 2 Gigabit
Ethernet connections.
Two special build options are offered for the P0 and P2 I/O. Instead of the 64
pins of rear I/O from the lower site XMC module's P4 connector, the P0
connector can instead carry I/O from the XMC module's P6 connector. An
option is also available to have the P2 connector's I/O compatible with the
XVME-6300 by giving up some of the PMC/XMC I/O normally available on
the P2 connector. Please consult the factory for these options.
In lieu of one PMC/XMC module, the optional XBRD-9060 I/O Expander
module may be installed to give more I/O on the front panel, as well as 2
SSD mSATA drives.
The module uses a FPGA-based VME bridge on a dedicated PCIe bus to
minimize VMEbus transfer times. The module will function in either a 3-row
(with reduced I/O) or 5-row VMEbus backplane, with or without a 3.3V
backplane power supply (reduced 5V & 3.3V power is available to the
PMC/XMC sites when a 5V-only power supply is available from the
backplane).
The optional XVME-9640 Rear-Transition Module is available to give easy
access to all of the P2 connector's I/O signals.
A two digit LED display is available for Power ON Self-Test (POST) codes,
should a problem arise during the boot operation. This display is available
for application software user codes after POST to aid in software debugging.
A 26-pin XDP debug connector is also available for connecting compatible
emulator tools directly to the CPU.
For more information see Intel
publication 479493, Shark Bay and Denlow Platforms Debug Port Design
Guide
.
