XVME-6500
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 27 -
http://www.acromag.com
- 27 -
www.acromag.com
3.6.2.1 DVI
A Digital Visual Interface (DVI) transmits uncompressed digital audio and
video signals from AV sources to video display devices. The DVI interface
originates from the CPU, and supports DVI-D (digital only),
The DVI interface utilizes transition minimized differential signaling (TMDS) to
transmit audio, video and auxiliary (control/status) data information through
the DVI cable.
The BIOS will automatically detect installed devices that are using DVI
interfaces, and will automatically configure the installed devices according to
the video BIOS settings. For further information regarding BIOS device
configuration BIOS, refer to Section 4.0, “BIOS Information and Configuration.
3.6.2.2 HDMI
(The information below is from Intel® document No. 328901, “Mobile
4th
Generation Intel® Core™ Processor Family Datasheet –
Volume 1 of 2”, Rev:
002; September, 2013.)
The High-Definition Multimedia Interface (HDMI) is provided for transmitting
uncompressed digital audio and video signals from DVD players, set-top
boxes, and other audiovisual sources to television sets, projectors, and other
video displays. It can carry high quality multi-channel audio data, and all
standard and high-definition consumer electronics video formats. The HDMI
display interface connecting the processor and display devices uses transition
minimized differential signaling (TMDS) to carry audiovisual information
through the same HDMI cable.
HDMI includes three separate communications channels: TMDS, DDC, and the
optional CEC (consumer electronics control). CEC is not supported on the
processor. The HDMI cable carries four differential pairs that make up the
TMDS data and clock channels. These channels are used to carry video, audio,
and auxiliary data. In addition, HDMI carries a VESA DDC. The DDC is used by
an HDMI Source to determine the capabilities and characteristics of the Sink.
Audio, video, and auxiliary (control/status) data is transmitted across the
three TMDS data channels. The video pixel clock is transmitted on the TMDS
clock channel and is used by the receiver for data recovery on the three data
channels. The digital display data signals driven natively through the PCH are
AC coupled and needs level shifting to convert the AC coupled signals to the
HDMI compliant digital signals.
The processor HDMI interface is designed in accordance with the High-
Definition Multimedia Interface with 3D, 4K, Deep Color, and x.v. Color.
3.6.2.3 Integrated Audio
(The information below is from Intel® document No. 328901, “Mobile 4th
Generation
Intel® Core™ Processor Family Datasheet –
Volume 1 of 2”, Rev:
002; September, 2013.)
