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SERIES IP503 INDUSTRIAL I/O PACK                  EIA/TIA-232E & CENTRONICS COMMUNICATION MODULE
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The information contained in this manual is subject to change
without notice.  Acromag, Inc. makes no warranty of any kind with
regard to this material, including, but not limited to, the implied
warranties of merchantability and fitness for a particular purpose.
Further, Acromag, Inc. assumes no responsibility for any errors
that may appear in this manual and makes no commitment to
update, or keep current, the information contained in this manual.
No part of this manual may be copied or reproduced in any form,
without the prior written consent of Acromag, Inc.

Table of Contents

Page

1.0    GENERAL INFORMATION............................................... . 2

KEY IP503 FEATURES ..................................................... 2
INDUSTRIAL I/O PACK INTERFACE FEATURES ............ 3
SIGNAL INTERFACE PRODUCTS.................................... 3
INDUSTRIAL I/O PACK SOFTWARE LIBRARY................ 3

2.0     PREPARATION FOR USE................................................ 3

UNPACKING AND INSPECTION..................................... . 3
CARD CAGE CONSIDERATIONS..................................... 4
BOARD CONFIGURATION.............................................. . 4
CONNECTORS................................................................. 4

IP Field I/O Connector (P2) ......................................... 4
Noise and Grounding Considerations .......................... 5
IP Logic Interface Connector (P1)................................ 5

3.0     PROGRAMMING INFORMATION..................................... 5

ADDRESS MAPS .............................................................. 5

IP Communication & Configuration Registers .............. 7
IP Identification PROM .............................................. 13

THE EFFECT OF RESET ................................................ 13

IP503 PROGRAMMING............................................. 14
FIFO Polled-Mode ..................................................... 14
FIFO Interrupt Mode .................................................. 14
Interrupt Generation................................................... 15
Programming The Parallel Port.................................. 15
Loopback Mode Operation......................................... 15
Programming Example .............................................. 16

4.0    THEORY OF OPERATION............................................... 17

EIA/TIA-232E SERIAL INTERFACE ................................ 17
THE CENTRONICS PARALLEL INTERFACE ................. 18
IP503 OPERATION ......................................................... 19
LOGIC/POWER INTERFACE .......................................... 20

5.0    SERVICE AND REPAIR................................................... 20

SERVICE AND REPAIR ASSISTANCE........................... 20
PRELIMINARY SERVICE PROCEDURE ........................ 20

6.0    SPECIFICATIONS............................................................ 20

GENERAL SPECIFICATIONS ......................................... 20
EIA/TIA-232E SERIAL PORTS ........................................ 21
DRIVERS/RECEIVERS ................................................... 21
CENTRONICS PARALLEL PORT ................................... 21
INDUSTRIAL I/O PACK COMPLIANCE........................... 21
APPENDIX ...................................................................... 21
CABLE: MODEL 5025-550 & 5025-551 ........................... 21
CABLE: MODEL 5025-944............................................... 22
CABLE: MODEL 5029-900............................................... 22
TERMINATION PANEL: MODEL 5025-552 ..................... 22
TERMINATION PANEL: MODEL 5029-910 ..................... 22
TRANSITION MODULE: MODEL TRANS-GP ................. 22

DRAWINGS

Page

4501-434 IP MECHANICAL ASSEMBLY ......................... 23
4501-550 IP503 SERIAL CABLE CONNECTIONS .......... 23
4501-569 RS-232 INTERFACE LEVELS ......................... 24
4501-572 RS-232 NULL MODEM CONNECTIONS ......... 25
4501-551 IP503 BLOCK DIAGRAM ................................. 26
4501-462 CABLE 5025-550 (NON-SHIELDED) ............... 27
4501-463 CABLE 5025-551 (SHIELDED) ........................ 27
4501-464 TERMINATION PANEL 5025-552 .................... 28
4501-465 TRANSITION MODULE TRANS-GP ................ 28

IMPORTANT SAFETY CONSIDERATIONS

 It is very important for the user to consider the possible adverse
effects of power, wiring, component, sensor, or software failures
in  designing any type of control or monitoring system.  This is
especially important where economic property loss or human life
is  involved.  It is important that the user employ satisfactory
overall  system design.  It is agreed between the Buyer and
Acromag, that  this is the Buyer's responsibility

10 GENERAL INFORMATION

The Industrial I/O Pack (IP) Series IP503 module provides

two EIA/TIA-232E serial communication ports and a bi-directional
Centronics parallel port for interfacing to the VMEbus or ISAbus,
according to your carrier board.  Four units may be mounted on a
carrier board to provide up to 8 asynchronous serial ports, plus 4
Centronics parallel ports per system slot

The transmit and receive paths of each channel include

generous 16-byte FIFO buffers to minimize CPU interaction.  Full
EIA/TIA-232E DB-9 signal support for dial-up and modem control
is included.  Character size, stop bits, parity, and baud rate are
software configurable.  Prioritized interrupt generation is also
supported for transmit, receive, line status, and data set
conditions.  The IP503 utilizes state of the art Surface-Mounted
Technology (SMT) to achieve its wide functionality and is an ideal
choice for a wide range of industrial communication interface
applications that require a highly reliable, high-performance
interface at a low cost

KEY IP503 FEATURES

• 

High Density - Provides programmable control of two
EIA/TIA-232E serial ports and one Centronics parallel port.
Four units mounted on a carrier board provide 8 serial
channels, plus 4 parallel ports, in a single VMEbus or
ISAbus (PC/AT) system slot

• 

16-Character FIFO Buffers - Both the transmit and receive
channels of each serial port provide 16-byte data buffering
(plus 3 framing bits per byte) to reduce CPU interactions

• 

Centronics Parallel Port - A bi-directional Centronics
parallel port is included for communicating with printers and
other devices

• 

Programmable Character Size - Each serial port is
software programmable for 5, 6, 7, or 8 bit character sizes

• 

Programmable Stop Bits - Each serial port allows 1, 1-1/2,
or 2 stop-bits to be added to, or deleted from, the serial data
stream

• 

Programmable Parity Generation & Detection - Even,
Odd, or No Parity generation and detection is supported

• 

Line-Break Generation & Detection - provisions for
sending and detecting the line break character is provided

• 

False Start Bit Detection - Prevents the receiver from
assembling false data characters due to low-going noise
spikes on the RxD input line

• 

Programmable Baud Rate - The internal baud rate
generator allows the 8MHz clock to be divided by any divisor
between 1 and 2

(16-1)

, providing support for any bit rate up to

128Kbps

• 

Individual Modem Control Signals - Each serial channel
includes a modem-control and modem-status register and
provides full EIA/TIA-232E modem line support, including
RTS, CTS, DTR, DSR, DCD, and RI

Содержание Series IP503

Страница 1: ...tion Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 624 1541 Fax 248 624 9234 Copyright 1995 Acromag Inc Printed in the USA Data and spe...

Страница 2: ...toring system This is especially important where economic property loss or human life is involved It is important that the user employ satisfactory overall system design It is agreed between the Buyer...

Страница 3: ...m performance with precision analog I O applications The X suffix of the model number denotes the length in feet Model 5029 944 IP503 Serial Communication Cable A 5 foot long flat 50 pin cable with a...

Страница 4: ...n assignments are unique to each IP model see Table 21 and normally correspond to the pin numbers of the field I O interface connector on the carrier board you should verify this for your carrier boar...

Страница 5: ...ground to safety ground via any device connected to these ports or a ground loop will be produced and this may adversely affect operation The communication cabling of the P2 interface carries digital...

Страница 6: ...ing Little Endian uses even byte addresses to store the low order byte As such use of this module on an ISAbus PC AT carrier board will require the use of the even address locations to access the 8 bi...

Страница 7: ...transmitted then data is right justified to the LSB If parity is used then LCR bit 3 parity enable and LCR bit 4 type of parity are required Status for the receiver is provided via the Line Status Reg...

Страница 8: ...gh to low transition start bit When the start bit is detected a counter is reset and counts the 16x sampling clock to 7 1 2 which is the center of the start bit The receiver then counts from 0 to 15 t...

Страница 9: ...NOT supported by this model FIFO Control Register FCR BIT FUNCTION 0 When set to 1 this bit enables both the Tx and Rx FIFO s All bytes in both FIFO s can be cleared by resetting this bit to 0Data is...

Страница 10: ...m Control Register 1 MCR Bit 4 provides a local loopback feature for diagnostic testing of the UART channel When set high the UART serial output connected to the TXD driver is set to the marking logic...

Страница 11: ...d by a read of the IIR Line Status Register continued LSR Bit FUNCTION PROGRAMMING 6 Transmitter Empty TEMT 0 Not Empty 1 Transmitter Empty set when both the Transmitter Holding Register THR and the T...

Страница 12: ...data lines This register is either output only or bi directional depending on the state of the extended mode bit bit 0 of the LEM register and the data direction control bit bit 5 of the LPC register...

Страница 13: ...interrupt source the ACKN line of the parallel port or bit 2 of the LPS register The serial ports and the parallel port interrupts drive INTREQ0 Bit 0 of this register drives the ENIRQ line of the UA...

Страница 14: ...atus of each channel can be read by the host CPU at any time during operation Two registers are used to report the status of a serial channel the Line Status Register LSR and the Modem Status Register...

Страница 15: ...s the last stop bit time when the following occurs Bit 5 of the LSR THRE is 1 and there is not a minimum of two bytes at the same time in the transmit FIFO since the last time THRE 1The first transmit...

Страница 16: ...Divisor Latch Access bit to permit access to the two divisor latch bytes used to set the baud rate These bytes share addresses with the Receive and Transmit buffers and the Interrupt Enable Register...

Страница 17: ...puters are considered DTE devices while modems are DCE devices The EIA TIA 232E interface is the fifth revision of this standard and defines an unbalanced single ended transmission standard for unidir...

Страница 18: ...ver a null modem cable connection is required to connect two like configured DTE ports due to the imbalance of drivers and receivers see Drawing 4501 572 Pins 1 18 of field I O connector P2 provide co...

Страница 19: ...S INPUT BUSY Pin 11 Input Line Printer Busy Active high signal from the printer that is asserted when the printer is not ready to accept more Data The state of this bit is monitored via Bit 7 of the L...

Страница 20: ...o obtain parts and repair PRELIMINARY SERVICE PROCEDURE Before beginning repair be sure that all of the procedures in Section 2 Preparation For Use have been followed Also refer to the documentation o...

Страница 21: ...t maximum Choose shielded or unshielded cable according to model number The unshielded cable is recommended for digital I O while the shielded cable is recommended for optimum performance with precisi...

Страница 22: ...Boards Application This panel converts the high density ribbon cable connectors coming from the APC8600 carrier board Acromag cable Model 5029 900 to screw terminals for direct wired interfaces This p...

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