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SERIES PMC341 PCI MEZZANINE CARD                                     SIMULTANEOUS ANALOG INPUT MODULE 
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Table 3.5:  Digital Output Codes and Input Voltages 

DESCRIPTION

 

ANALOG INPUT 

Model 

PMC341 (14-bit) 

Least Significant 
Bit Weight 

 

1.22mV

 

+ Full Scale 
Minus One LSB 

9.998779 

Volts 

 

7FFC 

hex 

Midscale 

0V 

0000h 

One LSB Below 
Midscale 

-1.22mV 

FFFC 

hex 

Minus Full Scale 

-10V 

8000 

hex 

 

Reference Voltage Access Register (Write, 1CH) 

 
This register is used to initiate a read of the reference voltage 

value.  The reference voltage value is provided so that software 
can adjust and improve the accuracy of the analog input voltage 
over the uncalibrated state.  The reference voltage is precisely 
measured at the factory and then stored to this location at the 
addresses given in table 3.6. 

 
The Reference Voltage Access Register is a write-only 

register and is used to configure and initiate a read cycle to the 
Reference Voltage memory.  Setting bit-15 of this register high, to 
a “1’’, initiates a read cycle.  Setting bit-15 of this register low, to 
a “0’’, initiates a write cycle. 

 
The address of the Reference Voltage to be read must be 

specified on bits 14 to 8 of the Reference Voltage Access 
register.   

 

Reference Voltage Access Register

 

Read or 

Write~ 

Address 

Write Data 

15 

14, 13, 12, 11, 10, 9, 8 

7 down to 0 

 
The reference voltage is stored in memory as a null 

terminated ASCII character string.  For example if the value 
4.99835 were stored to memory the corresponding ASCII 
characters would be 34, 2E, 39, 39, 38, 33, 35, 00 as shown in 
Table 3.6.  Note, the ASCII equivalent of a decimal point is 2E 
and the null character is 00.  The memory should be read starting 
at address 00 until the null ASCII character is read.  This string 
can then be converted into a float by using your compiler’s ATOF 
function. 

 

Table 3.6:  Reference Voltage Address Memory Map 

Address (Hex)

  

00 

01 

02 

03 

04 

05 

06 

07 

Example Reference Value 

null 

ASCII Characters As Stored In Memory 

34 

2E 

39 

39 

38 

33 

35 

00 

 
The address corresponding to each of the reference voltage 

digits is given in hex.  The most significant digit is stored at 
address 00 hex.  

 
For additional details on the use of the reference voltage, 

refer to the “Data Correction” section. 

 

Write accesses to the Reference Voltage Access register are 

possible via 32-bit or 16-bit data transfers, only.  Storing the 
reference voltage value to memory is normally only performed at 
the factory. 

 
A software or hardware reset has no affect on this register. 

 
Reference Voltage Read Data/Status Register (Read, 20H) 

 
The Reference Voltage Read Data/Status register is a read-

only register and is used to access the read data and determine 
the status of a read cycle initiated by the Reference Voltage 
Access register.  In addition, this register is used to determine the 
status of a write cycle to the memory.  When bit-1 of this register 
is set it indicates the memory is busy completing a write cycle. 

 
All read accesses to this Data/Status register initiate an 

approximately 1millisecond access to the memory.  

Thus, you 

must wait 1 millisecond after reading this Data/Status 
register before a new read or write cycle to the memory can 
be initiated, (an EEPROM latency limitation).

 

 
A read request, initiated through the Reference Voltage 

Access register, will provide the addressed digit of the reference 
voltage on data bits 15 to 8 of the Reference Voltage Data/Status 
register.  Although the read request via the Reference Voltage 
Access register is accomplished in 200 nano seconds, typically, 
the reference voltage digit will not be available in the Reference 
Voltage Data/Status register for approximately 2.5 milliseconds.   

 
Bit-0 of the Reference Voltage Data/Status register is the 

read complete status bit.  This bit will be set high to indicate that 
the requested reference voltage digit is available on data bits 15 
to 8 of the Reference Voltage Data/Status register.  This bit is 
cleared upon initiation of a new read access of the memory or 
upon issue of a hardware reset. 

 

Reference Voltage Read Data/Status Register

 

Read Data 

Not Used 

Write 

Busy 

Read 

Complete 

15 Down to 8 

7 Down to 2 

 
Writes to Reference Voltage memory require a special 

enable code and are normally only performed at the factory.  The 
module should be returned to Acromag if the reference voltage 
must be re-measured and stored to memory. 

 
A write operation to the memory, initiated via the Reference 

Voltage Access register, will take approximately 5 milliseconds.  
Bit-1 of the Reference Voltage Data/Status register serves as a 
write operation busy status indicator.  Bit-1 will be set high upon 
initiation of a write operation and will remain high until the 
requested write operation has completed.  New read or write 
accesses to the memory, via the Reference Voltage Access 
register, should not be initiated unless the write busy status bit-1 
is clear (set low to 0).  A hardware reset of the IP module will also 
clear this bit. 

 
Read accesses to the Reference Voltage Data/Status 

register are possible via 32-bit or 16-bit data transfers, only.  A 
software or hardware reset will clear all bits to zero. 

 
 
 

Содержание PMC341 Series

Страница 1: ...cess underutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Dem...

Страница 2: ...put Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 295 0310 Fax 248 624 9234 Copyright 2004 Acromag Inc Printed in the USA Data and spec...

Страница 3: ...GIC 16 MULTIPLEXER CONTROL CIRCUITRY 16 DATA TRANSFER FROM ADC TO FPGA 16 CONVERSION COUNTER 16 MEMORY BUFFER SWITCH CONTROL 16 EXTERNAL TRIGGER 16 INTERRUPT CONTROL LOGIC 16 REFERENCE VOLTAGE MEMORY...

Страница 4: ...cycle conversion mode is initiated by a software or external trigger External Trigger Input or Output The external trigger is assigned to a field I O line This external trigger may be configured as an...

Страница 5: ...operating temperature The dense packing of the PMC module to the carrier CPU board restricts air flow within the card cage and is cause for concern Adequate air circulation must be provided to preven...

Страница 6: ...e PMC341 is non isolated since there is electrical continuity between the logic and field I O grounds As such the field I O connections are not isolated from the carrier CPU board and backplane Care s...

Страница 7: ...IDSEL 25 AD 23 26 3 3V 27 AD 20 28 AD 18 29 GND 30 AD 16 31 C BE 2 32 GND 33 PCI RSVD 34 TRDY 35 3 3V 36 GND 37 STOP 38 PERR 39 GND 40 3 3V 41 SERR 42 C BE 1 43 GND 44 AD 14 45 AD 13 46 GND 47 AD 10 4...

Страница 8: ...00 Subsystem Vendor ID 0000 12 Not Used 13 14 Reserved 15 Max_Lat Min_Gnt Inter Pin Inter Line MEMORY MAP This board is allocated a 4K byte block of memory that is addressable in the PCI bus memory sp...

Страница 9: ...f channels 8 15 10 Enable Continuous Conversion Mode Conversions are initiated by a software start convert or external trigger and continued by BIT FUNCTION internal hardware triggers generated at the...

Страница 10: ...Low Bank Timer value divides an 8 MHz clock signal The output of this Low Bank Timer is used to precisely generate periodic trigger pulses to control the frequency at which all enabled channels are c...

Страница 11: ...of the Interrupt register to a logic one The interrupt request can also be disabled by setting bit 0 to a logic zero however the interrupt request will remain active on the PMC341 until released via...

Страница 12: ...e or hardware reset has no affect on this register Reference Voltage Read Data Status Register Read 20H The Reference Voltage Read Data Status register is a read only register and is used to access th...

Страница 13: ...onversions of all enabled channels The interrupt capability of the module can be employed as a means to indicate to the system that up to 512 samples depending on the threshold selected via the Thresh...

Страница 14: ...and offset values of channels 0 through 7 The five volt reference Auto Span Calibration Voltage and the ground reference Auto Zero voltage will need to be selected and converted through each of the e...

Страница 15: ...he reference voltage must be read until the null terminating character 00 is read To read the most significant digit the Reference Voltage Access register must be written with data value 8000H at Base...

Страница 16: ...tiplexer as required per the programming of the control register Up to 16 differential inputs can be monitored The multiplexer stage directs one of two groups of eight channels for simultaneous conver...

Страница 17: ...tized data from the A D converters to the memory buffer Only the channels enabled for conversion are stored in memory and tagged for channel identification CONVERSION COUNTER The ADC conversion rate i...

Страница 18: ...PMC modules 5 0 SERVICE AND REPAIR SERVICE AND REPAIR ASSISTANCE The PMC341 is shipped pre calibrated by Acromag and may be returned at the discretion of the customer to measure the accuracy of the c...

Страница 19: ...o the enclosure port 1KV direct to I O and European Norm EN50082 1 Surge Immunity Not required for signal I O per European Norm EN50082 1 Electric Fast Transient Immunity3 EFT Complies with IEC1000 4...

Страница 20: ...2 to keep non ideal grounds from degrading overall system accuracy Input Noise PMC3417 1 LSB rms Typical Note 7 Reference Test Conditions Temperature 25 C 125K conversions second using test PC with a...

Страница 21: ...Attributes See Drawing 4501 758 Electrical Specifications 30 VAC per UL and CSA SCSI 2 connector spec s 1 Amp maximum at 50 energized SCSI 2 connector spec s Operating Temperature 20 C to 80 C Storag...

Страница 22: ...SERIES PMC341 PCI MEZZANINE CARD SIMULTANEOUS ANALOG INPUT MODULE ___________________________________________________________________________________________ 21...

Страница 23: ...CH0 CH8 INTERRUPT AMP INST REGISTERS REGISTER HIGH BANKTIMER LOW BANKTIMER LOGIC COMMON FPGA PCILOGIC J1 J2 PMC341 BLOCK DIAGRAM 8501 878A INPUT MUX DATA P1 PRECISION CALIBRATION VOLTAGES CONTROL LOGI...

Страница 24: ...N D E D FOR LOWE S T N OI S E S H I E LD I S C ON N E C TE D TO GR OU N D R E FE R E N C E A T ON E E N D ON LY TO P R OV I D E S H I E LD I N G WI TH OU T GR OU N D LOOP S C H 0 P MC 341 C A R R I E...

Страница 25: ...SERIES PMC341 PCI MEZZANINE CARD SIMULTANEOUS ANALOG INPUT MODULE ___________________________________________________________________________________________ 24...

Страница 26: ...SERIES PMC341 PCI MEZZANINE CARD SIMULTANEOUS ANALOG INPUT MODULE ___________________________________________________________________________________________ 25...

Страница 27: ...uipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentat...

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