Acromag IP1K100 Series Скачать руководство пользователя страница 15

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SERIES IP1K100 INDUSTRIAL I/O PACK RECONFIGURABLE DIGITAL I/O MODULE
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Pin

Signal

I/O

Init_Done

Output (To CPLD)

GND

VCCINT

2.5Volts

VCCIO

3.3Volts

GND

RAMa11

Output

RAMa12

Output

RAMa13

Output

RAMa14

Output

RAMa15

Output

RAMa16

Output

RAMd0

Bi-Dir

RAMd1

Bi-Dir

GND

VCCINT

2.5Volts

VCCIO

3.3Volts

GND

RAMd2

Bi-Dir

RAMd3

Bi-Dir

RAMd4

Bi-Dir

RAMd5

Bi-Dir

RAMd6

Bi-Dir

RAMd7

Bi-Dir

VCCIO

3.3Volts

GND

RAMd8

Bi-Dir

RAMd9

Bi-Dir

RAMd10

Bi-Dir

RAMd11

Bi-Dir

VCCINT

2.5Volts

GND

TMS

(pulled high)

TRST

(pulled high)

nStatus

Output (Pulled High)

RAMd12

Bi-Dir

RAMd13

Bi-Dir

RAMd14

Bi-Dir

RAMd15

Bi-Dir

nWE_RAM

Output

nBLE_RAM

Output

GND

nBHE_RAM

Output

nOE_RAM

Output

DIO0

Bi-Dir

DIO1

Bi-Dir

DIO2

Bi-Dir

DIO3

Bi-Dir

VCCIO

3.3Volts

DIO4

Bi-Dir

DIO5

Bi-Dir

DIO6

Bi-Dir

DIO7

Bi-Dir

DIO8

Bi-Dir

VCCINT

2.5Volts

DIO9

Bi-Dir

DIO10

Bi-Dir

DIO11

Bi-Dir

GND

VCC_CKLK

2.5Volts

nBS0

Input (IP Bus)

IP CLK GCLK1

IP Module Clock

nBS1

Input (IP Bus)

GND_CKLK

GND

Pin

Signal

I/O

GND

DIO12

Bi-Dir

VCCIO

3.3Volts

DIO13

Bi-Dir

DIO14

Bi-Dir

DIO15

Bi-Dir

DIO16

Bi-Dir

DIO17

Bi-Dir

DIO18

Bi-Dir

VCCINT

2.5Volts

DIO19

Bi-Dir

DIO20

Bi-Dir

DIO21

Bi-Dir

DIO22

Bi-Dir

DIO23

Bi-Dir

DIO24

Bi-Dir

VCCIO

3.3Volts

DIO25

Bi-Dir

100

DIO26

Bi-Dir

101

DIO27

Bi-Dir

102

DIO28

Bi-Dir

103

DIO29

Bi-Dir

104

DIO30

Bi-Dir

105

nConfig

Input (From CPLD)

106

VCCINT

2.5Volts

107

MSEL1

Input (Tied High)

108

MSEL0

Input (Tied High)

109

GND

110

VCCIO

3.3Volts

111

DIO31

Bi-Dir

112

DIO32

Bi-Dir

113

DIO33

Bi-Dir

114

DIO34

Bi-Dir

115

DIO35

Bi-Dir

116

DIO36

Bi-Dir

117

GND

118

VCCIO

3.3Volts

119

DIO37

Bi-Dir

120

DIO38

Bi-Dir

121

DIO39

Bi-Dir

122

DIO40

Bi-Dir

123

GND

124

VCCINT

2.5Volts

125

DIO41

Bi-Dir

126

DIO42

Bi-Dir

127

DIO43

Bi-Dir

128

DIO44

Bi-Dir

129

GND

130

VCCINT

2.5Volts

131

DIO45

Bi-Dir

132

DIO46

Bi-Dir

133

DIO47

Bi-Dir

134

Not Used

I/O

135

DIFF_DIR1

Output (Pulled Low)

136

DIFF_DIR2

Output (Pulled Low)

137

GND

138

VCCIO

3.3Volts

139

DIFF_DIR3

Output (Pulled Low)

140

DIFF_DIR4

Output (Pulled Low)

141

DIFF_DIR5

Output (Pulled Low)

142

DIFF_DIR6

Output (Pulled Low)

143

DATA0

Bi-Dir D0 IP Bus

144

DATA8

Bi-Dir D8 IP Bus

Содержание IP1K100 Series

Страница 1: ...ard USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 624 1541 Fax 248 624 9234 Copyright 2001 Acromag Inc Printed in the USA Data and specifications are subject to change without notice 8500 681 B02H012 retired ...

Страница 2: ...PAIR ASSISTANCE 16 PRELIMINARY SERVICE PROCEDURE 16 6 0 SPECIFICATIONS 16 PHYSICAL 16 ENVIRONMENTAL 16 EIA RS485 RS422 TRANSCEIVERS 17 TTL TRANSCEIVERS 17 INDUSTRIAL I O PACK COMPLIANCE 17 APPENDIX 18 CABLE MODEL 5025 551 18 CABLE MODEL 5025 552 18 TRANSITION MODULE MODEL TRANS GP 18 DRAWINGS Page 4501 908 IP1K100 BLOCK DIAGRAM 19 4501 702 RS485 I O CONNECTIONS 20 4501 434 IP MECHANICAL ASSEMBLY 2...

Страница 3: ...as its own 8 bit ID information which is accessed via data transfers in the ID Read space 16 bit 8 bit I O Channel register Read Write is performed through D16 or D08 EO data transfer cycles in the IP module I O space High Speed Access times for all data transfer cycles are described in terms of wait states For the supplied IP module example wait states are utilized for all read and write operatio...

Страница 4: ...for future use in the event the product must be shipped This board is physically protected with packing material and electrically protected with an anti static bag during shipment However it is recommended that the board be visually inspected for evidence of mishandling prior to applying power The board utilizes static sensitive components and should only be handled at a static safe workstation CA...

Страница 5: ...y limited to less than 4000 feet To minimize transmission line problems all nodes connected to the cable must use minimum stub length connections The optimal configuration for the RS485 RS422 bus is a daisy chain connection from node 1 to node 2 to node 3 to node n The bus must form a single continuous path and the nodes in the middle of the bus must not be at the ends of long branches spokes or s...

Страница 6: ...nd configuration is implemented with no special hardware or cables An example program written in C is available from Acromag ActiveX Control or VxWorks software implements configuration of the IP1K100 over the IP bus The program requires your configuration file to be in the Intel Hex format Using the Altera MAX PLUS II software you can generate the required hex file as follows 1 In the MAX PLUS II...

Страница 7: ...rmation required for the module The IP1K100 ID space does not contain any variable e g unique calibration information ID space bytes are addressed using only the odd addresses in a 64 byte block on the Big Endian VMEbus Even addresses are used on the Little Endian PC ISA or PCI buses The IP1K100 ID space will read differently in configuration mode than it does in user mode In configuration mode th...

Страница 8: ...ormat Big Endian is the convention used in the Motorola 68000 and PowerPC microprocessor family and is the VMEbus convention In Big Endian the lower order byte is stored at odd byte addresses The Intel x86 family of microprocessors uses the opposite convention or Little Endian byte ordering Little Endian uses even byte addresses to store the low order byte As such use of the memory map for this mo...

Страница 9: ...f 8 channels Setting a bit high configures the data direction for the identified channels as output Setting the control bit low configures the corresponding channel s data direction for input The default power up state of these registers is logic low Thus all channels are configured as inputs on system reset or power up The unused upper nibble D15 to D12 of the register at base address 08H will al...

Страница 10: ...ata Bit 01 Data Bit 00 Ch07 Ch06 Ch05 Ch04 Ch03 Ch02 Ch01 Ch00 The unused upper 8 bits of this register are Not Used and will always read low 0 s for D16 accesses All bits are set to 0 following a reset which means that all interrupts are cleared Interrupt Polarity Registers Read Write Base 11H The Interrupt Polarity Register determines the level that will cause a channel interrupt to occur for ea...

Страница 11: ...h and Low registers This Length value is used by the hardware to set the number of clock cycles the Shift High and Shift Low values are shifted to the Clock Generator chip See the program procedure example which follows for information on determining the value to write to this register A write access to this register requires one wait state A software or hardware reset will clear the contents of t...

Страница 12: ...interrupts input channel bandwidth should be limited to reduce the possibility of missing channel interrupts For a given input channel this could happen if multiple changes occur before the channel s interrupt is serviced The response time of the input channels should also be considered when calculating this bandwidth The total response time is the sum of the input buffer response time plus the in...

Страница 13: ...own in Drawing 4501 908 as you review this material FIELD INPUT OUTPUT SIGNALS The field I O interface to the IP module is provided through connector P2 refer to Table 2 1 These pins are tied to the inputs and outputs of EIA RS485 RS422 line transceivers or TTL transceivers RS485 signals received are converted from the required EIA RS485 RS422 voltages signals to the TTL levels required by the FPG...

Страница 14: ...he address signals RAMa1 to RAMa16 data signals RAMd0 to RAMd15 and the read write control signals nWE_RAM nBLE_RAM nBHE_RAM and nOE_RAM as listed in Table 4 1 The RAM device is the Integrated Device Technology IDT71016 or the Cypress Cy7C1021 IP Bus Interface The IP1K100 interfaces to the carrier board per IP Module specification ANSI VITA 4 1995 The FPGA signals utilized are 16 data lines DATA0 ...

Страница 15: ... 76 GND GND 77 VCC_CKLK 2 5Volts 78 nBS0 Input IP Bus 79 IP CLK GCLK1 IP Module Clock 80 nBS1 Input IP Bus 81 GND_CKLK GND Pin Signal I O 82 GND GND 83 DIO12 Bi Dir 84 VCCIO 3 3Volts 85 DIO13 Bi Dir 86 DIO14 Bi Dir 87 DIO15 Bi Dir 88 DIO16 Bi Dir 89 DIO17 Bi Dir 90 DIO18 Bi Dir 91 VCCINT 2 5Volts 92 DIO19 Bi Dir 93 DIO20 Bi Dir 94 DIO21 Bi Dir 95 DIO22 Bi Dir 96 DIO23 Bi Dir 97 DIO24 Bi Dir 98 VCC...

Страница 16: ... REPAIR ASSISTANCE Surface Mounted Technology SMT boards are generally difficult to repair It is highly recommended that a non functioning board be returned to Acromag for repair The board can be easily damaged unless special SMT repair and service tools are used Further Acromag has automated test equipment that thoroughly checks the performance of each board When a board is first produced and whe...

Страница 17: ...rrent 250mA Maximum Input Hysteresis 70mV VCM 0V TTL TRANSCEIVERS Channel Configuration Up to 48 non isolated TTL signals Selected in blocks of 8 channels when ordered Integrated Circuit Device Pericom PI74FCT623T http www pericom com INDUSTRIAL I O PACK COMPLIANCE Specification This device meets or exceeds all written Industrial I O Pack specifications per ANSI VITA 4 1995 for 8MHz or 32MHz opera...

Страница 18: ... Pack modules Field signals are accessed via screw terminal strips The terminal strip markings on the termination panel 1 50 correspond to P2 pins 1 50 on the Industrial I O Pack IP Each Industrial I O Pack IP has its own unique P2 pin assignments Refer to the IP module manual for correct wiring connections to the termination panel Schematic and Physical Attributes See Drawing 4501 464 Field Wirin...

Страница 19: ...SERIES IP1K100 INDUSTRIAL I O PACK RECONFIGURABLE DIGITAL I O MODULE ___________________________________________________________________________________________ 19 ...

Страница 20: ...SERIES IP1K100 INDUSTRIAL I O PACK RECONFIGURABLE DIGITAL I O MODULE ___________________________________________________________________________________________ 20 ...

Страница 21: ...SERIES IP1K100 INDUSTRIAL I O PACK RECONFIGURABLE DIGITAL I O MODULE ___________________________________________________________________________________________ 21 ...

Страница 22: ...SERIES IP1K100 INDUSTRIAL I O PACK RECONFIGURABLE DIGITAL I O MODULE ___________________________________________________________________________________________ 22 ...

Страница 23: ...SERIES IP1K100 INDUSTRIAL I O PACK RECONFIGURABLE DIGITAL I O MODULE ___________________________________________________________________________________________ 23 ...

Страница 24: ...SERIES IP1K100 INDUSTRIAL I O PACK RECONFIGURABLE DIGITAL I O MODULE ___________________________________________________________________________________________ 24 4 5 0 1 4 6 4 A ...

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