AcroPack Series AP560
CAN Bus Interface Module
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10.
If the AP560
’s interrupt stimulus has been removed, the interrupt cycle is
completed and the board holds the INTA# inactive.
3.
THEORY OF OPERATION
This section contains information regarding the hardware of the AP560. A
description of the basic functionality of the circuitry used on the board is also
provided. Refer to the Block Diagram in Figure 1 as you review this material.
CAN BUS PHYSICAL CONNECTION
The four CAN transceivers connect to external cables via the field I/O signals
on the AcroPack carrier the AP560 is mounted on. The CAN channels are
electrically isolated from each other and from the host as well.
CARRIER INTERFACE
The interface to the carrier board is made by a 52-pin Mini-PCIe connector
(see Table 2) and a 100 pin Samtec board stacking connector (see Table 1).
These connectors also p5V and
12V power to the module. A Field
Programmable Gate-Array (FPGA) on the AcroPack Module provides an
interface to the carrier board per PCIe. The interface to the carrier board
allows complete control of all AP560 functions.
PCIe INTERFACE LOGIC
The PCIe interface is imbedded within the FPGA. This interface includes
support for PCI commands, including: configuration read/write, and memory
read/write. In addition, the PCIe endpoint uses a single 2K base address
register. The AP560 logic also implements interrupt requests via interrupt line
INTA#.
AP560 CONTROL LOGIC
All logic to communicate with the four CAN controller ICs is embedded in the
FPGA. Registers within the FPGA are accessible from the host processor over
the PCIe interface. Accesses to some of the registers within the FPGA trigger
secondary serial communications with devices external to the FPGA such as
the CAN controllers and Flash memory. The secondary serial transfers are
variable length, resulting in a variable time to complete the transfer. The bit
rate of the serial transfers to the CAN controllers is 15.625 MHz. The time to
transfer a single byte over the serial interface is 512 nS. The message length
varies from one to seventeen bytes which takes from 512 nS to 8.704 µS to
transfer. There is a busy bit in the interrupt register for each channel that
indicates the busy status of the message transfer. System software can poll
the busy bit to determine when the message transfer is complete. Optionally,
a transfer complete interrupt can be generated upon completion of a
message transfer.
Содержание AcroPack AP560
Страница 28: ...AcroPack Series AP560 CAN Bus Interface Module 28 Figure 2 Standard Data Frame...
Страница 30: ...AcroPack Series AP560 CAN Bus Interface Module 30 Figure 3 Extended Data Frame...
Страница 32: ...AcroPack Series AP560 CAN Bus Interface Module 32 Figure 4 Remote Frame...
Страница 34: ...AcroPack Series AP560 CAN Bus Interface Module 34 Figure 5 Error Frame...
