Acorn FileStore E01, Руководство по обслуживанию

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Chapter 5 E01S Fault finding
FileStore Service Manual 70
4.4.5 Econet Clock Generation
IC15, IC27 and IC22 generate the Econet clock signal with selectable speed and mark
space ratio. Links 6 and 7 select –l µs or 2 µs clock rates, derived from 0.5µs ф2. IC27
is a preloadable counter, links 5, 4 and 3 selecting loaded
count 1, 2 and
4. The
optimum setting is 200kHz. 1µs loaded count
=
4. IC26 is the clock transmitter,
enabled
by CB2 on IC31.
4.5 Battery backup
Some system variables are maintained in the CMOS RAM contained within IC1. The supply
to this RAM is produced during power down conditions by B1. B1 is charged by a constant
current source circuit (consisting of Q1, D1, D2, R4 and R5) during power on conditions.
IC1‘s supply is switched between the 5
Volt rail and B1 by D4 and D5.
4.6 The Econet port
4.6.1 Econet module
Most of the Econet hardware is provided on a removable PCB module which connects to the
main PCB via SK10 and SK1l. SK10 provides an interface to a standard Econet port,
presented as a 5-pin 180 degree DIN socket. The Econet PCB module contains the 68B54
high speed data link controller and its associated buffer circuitry. The data link controller is
under the control of the main processor using NMI. The module provides the following
functions:

Data transmission

Data reception

Clock reception and detection

Collision detection

Error detection
On-board circuits provide the Econet clock and termination.
4.6.2 Econet clock and active terminator
An on board clock is implemented using the master system clock at 2MHz divided down by
IC15 and IC27.This is passed to a differential line driver IC28 and thence to the clock lines.
Q6 and Q7 implements an active terminator which generates a 0.2V differential across the
data lines. The control lines for these two circuits are from IC31 PIN 19. The insertion of the
clock and terminator is automated to the extent that if a error in transmission or reception
occurs, the circuit is enabled. It will also be enabled if on power up the processor detects the
absence of the insertion of the DCD signal on the Econet module.
The frequency of the Econet clock is adjusted by links 3 and 4. See the Link Survey for
selection detail.
4.7 The disc interface
The disc interface is controlled by IC26, IC25, IC14, IC24 and IC23. Drive selection is
carried out by IC14. Data request and IRQ lines cause an NMI.
All floppy disc I/O is handled by a 2793 Floppy Disc Controller (IC26). For exact details of
this operation refer to the manufacturer‘s data sheet