Acorn FileStore E01, Руководство по обслуживанию

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Chapter 4 E20 Circuit description
FileStore Service Manual 40
MESSAGE (MSG, pin 42)
Is asserted by the target when it issues a message byte to notify completion of a command.
See Bus phases, below.
DATA BUS (DB0 to DB7, pins 2,4,6,8,10,12,14 and 16)
Is a parallel data bus consisting of 8 signals from DB0 (least significant) to DB7 (most
significant). 1 byte of information is transferred across the bus with each REQ/ACK
handshake. It is important to remember that the data lines are active-low and therefore are
inverted in both directions when communicating with the host microcomputer.
4.2.1 Other pins
All odd numbered pins are 0V, and pin 34 is +5V.
4.2.2 SCSI connector pinout (PL2 and J4)
SCSI pinouts are as follows:
Signal Pin Pin Signal
0V 1 2 DB0
0V 3 4 DB1
0V 5 6 DB2
0V 7 8 DB3
0V 9 10 DB4
0V 11 12 DB5
0V 13 14 DB6
0V 15 16 DB7
0V 17 18 }
0V 19 20 }
0V 21 22 }
0V 23 24 } For future expansion
0V 25 26 }
0V 27 28 }
0V 29 30 }
0V 31 32 }
0V 33 34 +5V to supply test equipment
0V 35 36 BSY
0V 37 38 ACK
0V 39 40 RST
0V 41 42 MSG
0V 43 44 SEL
0V 45 46 C/D
0V 47 48 REQ
0V 49 50 I/O
4.3 Bus phases
The bus has several distinct operational phases and cannot be in more than one of these
phases at any given lime.
Bus phases occur in a prescribed sequence. The reset condition can interrupt any phase and is
always followed by bus free. Any other phase can also be followed by the bus free phase.