LAP-F1 Logic Analyzer
|
User Guide v1.6
| www.zeroplus.com.tw
22
Item
Description
Code
P120LV (Low Voltage)
Incl. in base purchase
No
Signal Type
Single-ended
Channels (Max)
64
Input Impedance
190 kohm ± 10%
Capacitance
4.3 pF ± 2 pF
DUT Bandwidth (Max)
120 MHz
Transm. Rate (Max)
120 Mbit/s
Trigger Level
User-defined
Trigger Level Range
V
IH
: 0.6 to 5 V
Input Signal
0V to 5V
Input DC V (Max)
± 10 V
Table 1:8 LAP-F1 low-voltage probe specifications
The following probes are also available for the LAP-F1.
Item
TTL
Negative Logic
eMMC/SD
Code
P100TL
P120NE
P200EM
Incl. in base purchase
Yes
No
4 incl.
Signal Type
Single-ended
Single-ended
Single-ended
Channels (Max)
64
64
32
Input Impedance
530 kohm ± 10%
190 kohm ± 10%
190 kohm ± 10%
Capacitance
8.2 pF ± 2 pF
4.3 pF ± 2 pF
4.3 pF ± 2 pF
DUT Bandwidth (Max) 100 MHz
120 MHz
200 MHz
Transm. Rate (Max)
100 Mbit/s
120 Mbit/s
400 Mbit/s
Trigger Level
User-defined
User-defined
User-defined
Trigger Level Range
V
IH
: 2 to 5 V
V
IH
: 0.3 to 5 V
or
V
IH
: -0.2 to -1.5 V
V
IH
: 0.6 to 5 V
Input Signal
-5 to 5 V
-5 to 5V
0 to 5V
Input DC V (Max)
± 5 V
± 10 V
± 10 V
Table 1:9 LAP-F1 special purpose probes specifications
NOTE
Voltages that exceed the Input DC level can damage the probes.
