Yamaha YSP-4300, Service Manual

Page: 90 / 171

Pin
No.
Port Name
Function
Name
I/O Detail of Function
23 SD_DO SD_DO I SD card Data In terminal
24 SD_CLK SD_CLK O SD card Clock terminal
25 SD_DI SD_DI O SD card Data Out terminal
26 SD_CS SD_CS O SD card Chip Select terminal
27 DVSS VDSS – GND terminal
28 FL_CS FL_CS O Serial FLASH ROM chip select terminal
29 TEST/CLK12MO TEST I/O [TEST] pull-up to VDD1 system power supply terminal (TEST pin),
[CLK12MO] 12MHz clock output terminal
30 TEST5 TEST5 O [TEST5] OPEN (TEST pin)
31 TEST6 TEST6 I [TEST6] pull-up to VDD1 system power supply terminal (TEST pin)
32 TEST7 TEST7 I [TEST7] pull-up to VDD1 system power supply terminal (TEST pin)
33 DVDDIO DVDDIO – IO power supply (VDD1) terminal
34 TEST8 TEST8 I [TEST8] pull-up to VDD1 system power supply terminal (TEST pin)
35 TEST9 TEST9 I [TEST9] pull-up to VDD1 system power supply terminal (TEST pin)
36 TEST10 TEST10 O OPEN (TEST pin, IPL ERROR flag output)
37 DVSS DVSS – GND terminal
38 DVDD_M2 DVDD – CORE power supply (VDD2) monitor terminal, connect to DVDD_M1 pin
39 ATEST1 ATEST1 O USB TEST terminal (TEST pin), OPEN
40 AVDDC ADVDD – USB power supply (VDD1) terminal
41 USB_DM USB_DM I/O USB D-I/O terminal
42 USB_DP USB_DP I/O USB D+I/O terminal
43 AVSSC AVSSC – USB GND terminal
44 REXTI REXTI O USB bias resistor (12k-ohms) connecting terminal
45 VOREFI VOREFI O USB TEST terminal (TEST pin), OPEN
46 VSS_PLL VSS_PLL – PLL GND terminal
47 TEST_PLL1 TEST_PLL1 I PLL TEST terminal (TEST pin), OPEN
48 XIN_PLL XIN_PLL I X'tal (16.9344MHz) connecting input terminal
49 XOUT_PLL XOUT_PLL O X'tal (16.9344MHz) connecting output terminal
50 TEST_PLL2 TEST_PLL2 O PLL TEST terminal (TEST pin), pull-up to VDD1 system power supply terminal
51 VDD_PLL VDD_PLL – PLL power supply (VDD1) terminal
52 DAVSS DA_VSS – Audio DAC GND terminal
53 RDACO RDACO O Audio DAC Rch line output terminal
54 VCDACO VCDACO O Audio DAC reference voltage output terminal
55 LDACO LDACO O Audio DAC Lch line output terminal
56 DAVDD DAVDD – Audio DAC power supply (VDD1) terminal
57 DVSS DVSS – GND terminal
58 AMUTE AMUTE O Audio Mute output terminal (H: MUTE OFF, L: MUTE ON)
59 TEST11 TEST11 O OPEN (TEST pin)
60 TEST12/MCLK TEST12 O [TEST12] OPEN (TEST pin),
[MCLK] digital audio master clock (16.9344MHz) output terminal
61 LED_ERROR/SS_CS SS_CS O/I [LED] lighting output terminal at ERROR, [SS_CS] slave SIO chip select in terminal
62 LED_PLAY/SS_DI SS_DI O/I [LED] lighting output terminal at PLAY, [SS_DI] slave SIO data in terminal
63 LED_PSD/SS_CLK SS_CLK O/I [LED] lighting output terminal at PLAY for SD card, [SS_CLK] slave SIO clock in terminal
64 LED_PUSB/SS_DO SS_DO O [LED] lighting output terminal at PLAY for USB memory,
[SS_DO] slave SIO data out terminal
65 LED_ACCESS/LRCKO LRCKO O [LED] lighting output terminal when memory is being accessed,
[LRCKO] digital audio channel clock or SPDIF output terminal
66 LED_RANDOM/BCKO BCKO O [LED] lighting output terminal at PLAY for RANDOM,
[BCKO] digital audio bit clock output terminal
67 LED_REPEAT/SDATAO SDATAO O [LED] lighting output terminal at PLAY for REPEAT,
[SDATAO] digital audio data output terminal
68 DVDDIO DVDDIO – IO power supply (VDD1) terminal
69 TEST13 TEST13 O OPEN (TEST pin)
70 TEST14 TEST14 O OPEN (TEST pin)
71 SEL_USB SEL_USB I At device (USB, SD) connection, 1st device detection selection (H: USB, L: SD)
72 TEST4 TEST4 I Pull-up to VDD1 system power supply terminal (TEST pin)
73 TEST3 TEST3 I Pull-up to VDD1 system power supply terminal (TEST pin, L: IPL write mode 1)
74 TEST2 TEST2 I Pull-up to VDD1 system power supply terminal (TEST pin, L: IPL write mode 2)
75 TEST1 TEST1 I Pull-up to VDD1 system power supply terminal (TEST pin)
76 TMODE TMODE I Connect to GND (TEST pin)
77 DVSS DVSS – GND terminal
78 DVDD_M1 DVDD – CORE power supply (VDD2) monitor terminal, connect to bypass condenser
79 DVDDIO DVDDIO – IO power supply (VDD1) terminal
80 TEST0 TEST0 I Connect to GND (TEST pin)
90
YSP-CU4300/YSP-CU3300/NS-WSW160
Y
SP-CU430
0/Y
SP-CU330
0/
NS-WSW1
60
DRAFT