Chapter 5 - Memory Expansion Module (XVME-956/101)
The following is some additional information on the usage of Control Register 2.
• R e a d only bits 7 and 6 indicate battery voltage. I f the bit is a zero, the battery is above the
threshold (2.2 VDC). A one indicates the battery is below the threshold ( <2.2 Vdc) or not
installed. B i t 7 is VB2, the battery connected to J5. B i t 6 is VB1, the battery connected to J4.
• B i t 5 is the power fail alarm. A zero means system
(not battery)
voltage has dropped below the
voltage selected with W10.
Bit 4 is reserved. Always set this bit to zero when writing to register 2 (674h or 675h).
Bit 3 (-WENO) provides a software controlled write protect/write enable bit. I t allows write
protection of SRAMs and Flash EPROMs. I f bit 3 is zero, the PC bus signal -SMEMW is
available to the byte-wide sockets, allowing normal read/write operation. I f bit 3 is a one,
writing to devices in the byte-wide sockets is inhibited. W i t h writing inhibited, these become
read-only devices.
• B i t 2 provides software control of the +12 Vpp for Flash EPROM programming. Flash EPROM
programming is discussed later in this chapter. I f this bit is one, +12 volts is routed to W2-3 and
W7-3.
• B i t s 1 and 0 are used to select 64K byte pages of larger memory devices. (See Figure
5-5.)
5.8.3 R e a d i n g the Registers
Both Control Registers are readable. Control Register 1 and most of 2 are writable. Three read-only bits
(7-5) in Control Register 2 provide information about the state of the off board batteries and the power fail
alarm.
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