Xilinx Virtex-5 RocketIO GTP, User Manual

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Virtex-5 RocketIO GTP Transceiver User Guide www.xilinx.com 85
UG196 (v1.3) May 25, 2007
Power Control
R
Powerdown Transition Times
The delays between changes in the powerdown state when TXPOWERDOWN and
RXPOWERDOWN are changed are controlled by the TRANS_TIME_FROM_P2,
TRANS_TIME_NON_P2, and TRANS_TIME_TO_P2 attributes as described in
Table 5-10 .
Each TRANS_TIME delay is set in terms of internal 25 MHz clock cycles. The internal
25 MHz clock rate is set using the CLK25_DIVIDER attribute and the reference clock rate.
Equation 5-6 is used to determine the actual rate.
Equation 5-6
Examples
The example shown in Figure 5-10 shows the recommended method to power down an
unused tile or an unused transceiver in a tile.
Transition time in ns
CLK25_DIVIDER
CLKIN
-----------------------------------------------
⎝ ⎠
⎛ ⎞
TRANS_TIME attribute
×
=
Figure 5-10: Powering Down an Unused Tile
GTP_DUAL Tile
PLLPO W ERDO WN
REFCLKP W RD N B
RXPO W ERDO WN 0[1]
RXPO W ERDO WN 0[0]
RXPO W ERDO WN 1[1]
RXPO W ERDO WN 1[0]
TXPO W ERDO WN 0[1]
TXPO W ERDO WN 0[0]
TXPO W ERDO WN 1[1]
TXPO W ERDO WN 1[0]
1
1
1
1
1
1
1
1
1
0
GTP_DUAL Tile
PLLPO W ERDO WN
REFCLKP W RD N B
RXPO W ERDO WN 0[1]
RXPO W ERDO WN 0[0]
RXPO W ERDO WN 1[1]
RXPO W ERDO WN 1[0]
TXPO W ERDO WN 0[1]
TXPO W ERDO WN 0[0]
TXPO W ERDO WN 1[1]
TXPO W ERDO WN 1[0]
1
1
1
1
Disa b led
Transcei v er
Controlled
b y
Application
Disa b led Tile Disa b led Transcei v er
UG196_c5_10_082906