WAGO 765-1202/0100-0000, Product Manual

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765-1202/0100-0000 Planning
36 Product manual | Version: 1.0.0
16DIO FLD EC DC 24V 2.0A
Current Description
I
X01_1L
,
I
X02_1L
,
... ,
I
X04_1L
Total current for supply cable 1 at digital input/output X0i (i.e., port X01,
X02, ... , X04); corresponds to current I
X0i_pin3_1L
on pin 3 (ground). This
current is the sum of the currents at pins 1, 2 and 4 of digital input/output
X0i:
I
X0i_1L
= I
X0i_pin3_1L
= I
X0i_pin1_1L
+ I
X0i_pin2_1L
+ I
X0i_pin4_1L
I
module_1L
Module current I
module_1L =
I
X01_1L_3
+ I
X02_1L_3
+ I
X03_1L_3
+ I
X04_1L_3
For supply cable 2L of the 0765-1202/0100-0000 Digital Input/Output Module, the cur-
rents declared in the following table must be taken into account:
Table 33: Module 0765-1202/0100-0000 – Currents in Supply Cable 2
Current Description
I
X31_2L
Current to PWR IN (X31) connection: current 2L / reverse current 2L−
I
X32_2L
Current to PWR OUT (X32) connection: current 2L / reverse current 2L−
I
X05_2L
,
I
X06_2L
,
… ,
I
X08_2L
Total current for supply cable 2 at digital input/output X0i (i.e., port X05,
X06, ... , X08); corresponds to current I
X0i_Pin3_2L
at pin 3 (ground). This cur-
rent is the sum of the currents at pins 1, 2 and 4 of digital input/output
X0i:
I
X0i_2L
= I
X0i_pin3_2L
= I
X0i_pin1_2L
+ I
X0i_pin2_2L
+ I
X0i_pin4_2L
I
module_2L
Module current I
module_2L =
I
X05_pin3_2L
+ I
X06_pin3_2L
+ I
X07_pin3_2L
+ I
X08_pin3_2L
During operation of the 0765-1202/0100-0000 Digital Input/Output Module, the rules be-
low for the currents in supply cables 1 and 2 must be followed at all times:
Table 34: Rules for Supply Cables 1 and 2
Current Supply Cable 1 Supply Line 2
Total current for the supply cable
(rule 1) I
X31_1L
≤ 16 A
I
X31_1L
= I
logic
+ I I
module_1L
I
X31_2L
≤ 16 A
I
X31_2L
= I
X32_2L
+ I
module_2L
Permissible current feedthrough
(rule 2) I
X32_1L
≤ 16 A − I
logic
− I
module_1L
I
X32_2L
≤ 16 A − I
module_2L
Ports Ports X01, ... , X04 (henceforth
summarized as port X0i for 1 ≤ i ≤ 4) Ports X05, ... , X08 (henceforth
summarized as port X0i for 5 ≤ i ≤ 8)
Supply current on pin 1 (rule 3) I
X0i_pin1_1L
≤ 4 A I
X0i_pin1_2L
≤ 4 A
Signal current on pin 2/4 in normal
operation (rule 3) I
X0i_pin2_1L
≤ 2 A
I
X0i_pin4_1L
≤ 2 A
I
X0i_pin2_2L
≤ 2 A
I
X0i_pin4_2L
≤ 2 A
Signal current on pin 2/4 in overload
operation (rule 3) I
X0i_pin2_1L
≤ 2.4 A
I
X0i_pin4_1L
≤ 2.4 A
I
X0i_pin2_2L
≤ 2.4 A
I
X0i_pin4_2L
≤ 2.4 A
Reverse current to pin 3 (ground)
(rule 3) I
X0i_pin3_1L
≤ 4 A I
X0i_pin3_2L
≤ 4 A