VIPA SPEED7 CPU 313SCDPM Manual Download Page 48

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5.3 Addressing

5.3.1 Overview

To provide specific addressing of the installed peripheral modules,

certain addresses must be allocated in the CPU. At the start-up of the

CPU, this assigns automatically peripheral addresses for digital in-/

output modules starting with 0 and ascending depending on the slot

location. If no hardware project engineering is available, the CPU

stores at the addressing analog modules to even addresses starting

with 256.

5.3.2 Addressing Backplane bus I/O devices

The CPU 313-6CF13 provides an I/O area (address 0 ... 8191) and a

process image of the in- and outputs (each address 0 ... 127). The

process image stores the signal states of the lower address (0 ... 127)

additionally in a separate memory area.
The process image this divided into two parts:

process image to the inputs (PII)

process image to the outputs (PIQ)

The process image is updated automatically when a cycle has been

completed.

At deployment of the CPU 313-6CF13 you may control up to 31

modules at the bus. Here the maximum of 8 modules per row may be

parameterized.
For the project engineering of more than 8 modules line interface con-

nections are to be used. For this you set in the hardware configurator

the module IM 360 from the hardware catalog to slot 3 of your 1. pro-

file rail. Now you may extend your system with up to 3 profile rails by

starting each with an IM 361 from Siemens at slot 3.

You may access the modules with read res. write accesses to the

peripheral bytes or the process image. To define addresses a hard-

ware configuration may be used. For this, click on the properties of

the according module and set the wanted address.

If you do not like to use a hardware configuration, an automatic

addressing comes into force. At the automatic address allocation

DIOs occupy depending on the slot location always 4byte and AIOs,

FMs, CPs always 16byte at the bus. Depending on the slot location

the start address from where on the according module is stored in the

address range is calculated with the following formulas:

Max. number of plug-

gable modules

Define addresses by

hardware configuration

Automatic addressing

VIPA System 300S

Deployment CPU 313-6CF13

Addressing > Addressing Backplane bus I/O devices

HB140 | CPU-SC | 313-6CF13 | GB | 15-50

Summary of Contents for SPEED7 CPU 313SCDPM

Page 1: ...CPU SC 313 6CF13 Manual HB140 CPU SC 313 6CF13 GB 15 50 VIPA System 300S SPEED7 CPU 313SC DPM ...

Page 2: ...313 6CF13_000_CPU 313SC DPM 1 GB 2015 VIPA GmbH Ohmstr 4 91074 Herzogenaurach Telephone 49 9132 744 0 Fax 49 9132 744 1864 Email info vipa com Internet www vipa com ...

Page 3: ...ory management 31 4 2 5 Storage media slot 31 4 2 6 Battery backup for clock and RAM 32 4 2 7 Operating mode switch 32 4 2 8 LEDs 33 4 3 Technical data 35 5 Deployment CPU 313 6CF13 47 5 1 Assembly 47 5 2 Start up behavior 47 5 3 Addressing 48 5 3 1 Overview 48 5 3 2 Addressing Backplane bus I O devices 48 5 4 Address assignment 49 5 5 Hardware configuration CPU 50 5 6 Hardware configuration I O m...

Page 4: ...4 6 5 1 Counter Fast introduction 104 6 5 2 SFB 47 COUNT Counter controlling 109 6 5 3 Counter Functions 114 6 5 4 Counter Additional functions 119 6 6 Frequency measurement 126 6 6 1 Overview 126 6 6 2 Inputs for the frequency measurement 127 6 6 3 Parameterization 128 6 6 4 SFB 48 FREQUENC Frequency measurement 129 6 7 Pulse width modulation PWM 132 6 7 1 Overview 132 6 7 2 Parameterization 134 ...

Page 5: ... 3 Example project engineering 188 9 3 1 Job definition 188 9 3 2 Project engineering 188 9 3 3 Test the PLC program in the Simulator 194 9 3 4 Transfer PLC program to CPU and its execution 195 10 Configuration with TIA Portal 197 10 1 TIA Portal Work environment 197 10 1 1 General 197 10 1 2 Work environment of the TIA Portal 197 10 2 TIA Portal Hardware configuration CPU 198 10 3 TIA Portal Hard...

Page 6: ...Every effort has been made to ensure that the information contained in this document was complete and accurate at the time of publishing Nevertheless the authors retain the right to modify the information This customer document describes all the hardware units and functions known at the present time Descriptions may be included for units which are not present at the customer site The exact scope o...

Page 7: ...1074 Herzogenaurach Germany Telefax 49 9132 744 1204 EMail documentation vipa de Contact your local VIPA Customer Service Organization representa tive if you encounter problems with the product or have questions regarding the product If you are unable to locate a customer service centre contact VIPA as follows VIPA GmbH Ohmstraße 4 91074 Herzogenaurach Germany Tel 49 9132 744 1150 Hotline EMail su...

Page 8: ...formation and useful tips 1 3 Safety information The system is constructed and produced for n communication and process control n industrial applications n operation within the environmental conditions specified in the technical data n installation into a cubicle DANGER This device is not certified for applications in in explosive environments EX zone The manual must be available to all personnel ...

Page 9: ...ried out when the system has been disconnected from power Installation and hardware modifications only by prop erly trained personnel The national rules and regulations of the respective country must be satisfied installation safety EMC National rules and regulations apply to the disposal of the unit Disposal VIPA System 300S General Safety information HB140 CPU SC 313 6CF13 GB 15 50 9 ...

Page 10: ...tention to the applicable rules and regulations for handling the respective equipment can prevent failures of electrostatic sensitive modules Modules must be shipped in the original packing material When you are conducting measurements on electrostatic sensitive modules you should take the following precautions n Floating instruments must be discharged before use n Instruments must be grounded Mod...

Page 11: ...ing has the lowest priority 2 2 2 Applications The program that is present in every CPU is divided as follows n System routine n User application The system routine organizes all those functions and procedures of the CPU that are not related to a specific control application This consists of all the functions that are required for the processing of a specific control application The operating modu...

Page 12: ...m of bytes words or double words You may always access the current data block by means of operands You may access the following types of data n individual Bits n Bytes n Words n Double words 2 3 CPU 313 6CF13 The CPU 313 6CF13 bases upon the SPEED7 technology This sup ports the CPU at programming and communication by means of co processors that causes a power improvement for highest needs n The CP...

Page 13: ...ace for PG OP communication After assigning IP address parameters with your configuration tool via the PLC functions you may directly access the Ethernet PG OP channel and program res remote control your CPU You may also access the CPU with a visualization software via these connections n Wiring by means of spring pressure connections CageClamps at the front connector n Core cross section 0 08 2 5...

Page 14: ...tage to reference earth Inputs outputs AC DC 50V test voltage AC 500V Protective measures against short circuit Environmental conditions to EN 61131 2 Climatic Storage transport EN 60068 2 14 25 70 C Operation Horizontal installation hanging EN 61131 2 0 60 C Horizontal installation lying EN 61131 2 0 55 C Vertical installation EN 61131 2 0 50 C Air humidity EN 60068 2 30 RH1 without condensation ...

Page 15: ...verity 2 EN 61000 4 3 HF field immunity casing 80MHz 1000MHz 10V m 80 AM 1kHz 1 4GHz 2 0GHz 3V m 80 AM 1kHz 2GHz 2 7GHz 1V m 80 AM 1kHz EN 61000 4 6 HF conducted 150kHz 80MHz 10V 80 AM 1kHz EN 61000 4 4 Burst degree of severity 3 EN 61000 4 5 Surge installation class 3 Due to the high energetic single pulses with Surge an appropriate external protective circuit with lightning protection elements l...

Page 16: ...3 1 Installation dimensions 2tier width WxHxD in mm 80 x 125 x 120 Dimensions Basic enclosure Dimensions Installation dimensions VIPA System 300S Assembly and installation guidelines Installation dimensions HB140 CPU SC 313 6CF13 GB 15 50 16 ...

Page 17: ...0 140 10 390 1AE80 482 466 8 3 390 1AF30 530 500 15 390 1AJ30 830 800 15 390 9BC00 2000 Drillings only left 15 Unit pack 10 pieces Measures in mm For the communication between the modules the System 300S uses a backplane bus connector Backplane bus connectors are included in the delivering of the peripheral modules and are clipped at the module from the backside before installing it to the profile...

Page 18: ...supply by screwing 7 Take a backplane bus connector and click it at the CPU from the backside like shown in the picture 8 Stick the CPU to the profile rail right from the power supply and pull it to the power supply 9 Click the CPU downwards and bolt it like shown 10 Repeat this procedure with the peripheral modules by clicking a backplane bus connector stick the module right from the modules you ...

Page 19: ...re on the left side shows the cabling step by step from top view 1 For cabling you push the locking vertical to the inside with a suiting screwdriver and hold the screwdriver in this position 2 Insert the de isolated wire into the round opening You may use wires with a cross section from 0 08mm2 to 2 5mm2 3 By removing the screwdriver the wire is connected safely with the plug connector via a spri...

Page 20: ... to top res from top to bottom if the cables should be led out at the top 6 Bolt also the connection screws of not cabled screw clamps 7 Fix the cable binder for the cable bundle 8 Push the release key at the front connector on the upper side of the module and at the same time push the front connector into the module until it locks 9 Now the front connector is electrically connected with your modu...

Page 21: ...e cable bundle and the front connector 7 Fix the cable binder for the cable bundle 8 Bolt the fixing screw of the front connector 9 Now the front connector is electrically connected with your module 10 Close the front flap 11 Fill out the labeling strip to mark the single channels and push the strip into the front flap 3 4 Installation guidelines The installation guidelines contain information abo...

Page 22: ...when installing your components Install a central connection between the ground and the pro tected earth conductor system Connect all inactive metal extensive and impedance low Please try not to use aluminium parts Aluminium is easily oxi dizing and is therefore less suitable for grounding n When cabling take care of the correct line routing Organize your cabling in line groups high voltage curren...

Page 23: ...y you should always lay the isolation of cables on both sides Only by means of the both sided connection of the isolation you achieve high quality interference suppression in the higher frequency area Only as exception you may also lay the isolation one sided Then you only achieve the absorption of the lower fre quencies A one sided isolation connection may be convenient if the conduction of a pot...

Page 24: ...ckable n Status LEDs for operating state and diagnostics n Real time clock battery buffered n Digital I Os DI 16xDC24V DO 16xDC24V 0 5A n 3 channels for counter frequency measurement and pulse width modulation n I O address range digital analog 1024byte n 512 timer 512 counter 8192 flag byte Type Order number Description 313SC 313 6CF13 MPI interface Card slot Real time clock Ethernet interface fo...

Page 25: ...4 LEDs of the I O part 5 Operating mode switch CPU 6 Slot for DC 24V power supply 7 Twisted pair interface for Ethernet PG OP channel 8 PtP PROFIBUS DP interface 9 MPI interface The components 6 9 are under the front flap CPU 313 6CF13 VIPA System 300S Hardware description Structure General HB140 CPU SC 313 6CF13 GB 15 50 25 ...

Page 26: ...in SubD jack n The MPI interface serves for the connection between program ming unit and CPU n By means of this the project engineering and programming hap pens n MPI serves for communication between several CPUs or between HMIs and CPU n Standard setting is MPI Address 2 9pin SubD jack Per default the RS485 interface X3 of the CPU is used for the PROFIBUS DP master The functionality of this inter...

Page 27: ...otocols are supported ASCII STX ETX 3964R USS and Modbus Master ASCII RTU The PtP communication is configured during run time by means of the SFC 216 SER_CFG The communication hap pens by means of the SFC 217 SER_SND and SFC 218 SER_RCV You can only use one interface with PtP respectively PROFIBUS functionality 8pin RJ45 jack n The RJ45 jack serves the interface to the Ethernet PG OP channel n Thi...

Page 28: ...nput 16xDC 24V with interrupt capability n Digital Output 16xDC 24V 0 5A n Technological functions 3 channels X11 CAUTION Please regard that the voltage at an output channel is always the supply voltage connected to L Overview VIPA System 300S Hardware description Structure In Output area CPU 313 6CF13 HB140 CPU SC 313 6CF13 GB 15 50 28 ...

Page 29: ... 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 Channel 2 A Pulse 9 I 0 7 Channel 2 B Direction 10 not used 11 not used 12 I 1 0 Channel 2 HW gate 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Latch 18 I 1 6 Channel 2 Latch 19 I 1 7 20 Ground 1M DI VIPA System 300S Hardware description Structure In Output area CPU 313 6CF13 HB140 CPU SC 313 6CF13 GB 15 50 29 ...

Page 30: ...gnment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 Channel 2 Output 25 Q 0 3 26 Q 0 4 27 Q 0 5 28 Q 0 6 29 Q 0 7 30 Ground 2M DO 31 3L Power supply DC 24V 32 Q 1 0 33 Q 1 1 34 Q 1 2 35 Q 1 3 36 Q 1 4 37 Q 1 5 38 Q 1 6 39 Q 1 7 40 Ground 3M DO VIPA System 300S Hardware description Structure In Output area CPU 313 6CF13 HB140 CPU SC 31...

Page 31: ...tension card 4 2 5 Storage media slot n As external storage medium for applications and firmware you may use a MMC storage module Multimedia card n The VIPA storage media are pre formatted with the PC format FAT16 and can be accessed via a card reader n After PowerON respectively an overall reset the CPU checks if there is a storage medium with data valid for the CPU n Push the memory card into th...

Page 32: ...uffer time continu ously Only after a charging time of 24 hours there is a buffer for max 30 days CAUTION After a power reset and with an empty battery the CPU starts with a BAT error and executes an overall reset The loading procedure is not influenced by the BAT error The BAT error can be deleted again if once during power cycle the time between switching on and off the power supply is at least ...

Page 33: ...ere is a system fault More information may be found in the diagnostics buffer of the CPU X X X X Variables are forced X X X X Access to the memory card X BB Blinking with 10Hz Configuration is loaded Overall reset BB X X X Overall reset is requested BB X X X Blinking with 5Hz Overall reset is executed Factory reset Factory reset is executed Factory reset finished without error Firmware update BB B...

Page 34: ... about the state of operation of the PROFIBUS part according to the following pattern Master operation RN RUN ER ERR DE IF Meaning green red green red Master has no project this means the interface is deactivated respectively PtP is active Master has bus parameters and is in RUN without slaves BB Master is in clear state safety state The inputs of the slaves may be read The outputs are disabled Ma...

Page 35: ...iguration with the Siemens TIA Portal the number of timer and counters is limited to the maximum possible number of the corresponding Sie mens CPU Order no 313 6CF13 Type CPU 313SC DPM SPEED Bus Technical data power supply Power supply rated value DC 24 V Power supply permitted range DC 20 4 28 8 V Reverse polarity protection ü Current consumption no load operation 200 mA Current consumption rated...

Page 36: ...mA Input delay of 0 to 1 0 1 0 35 ms Input delay of 1 to 0 0 1 0 35 ms Number of simultaneously utilizable inputs hori zontal configuration 16 Number of simultaneously utilizable inputs ver tical configuration 16 Input characteristic curve IEC 61131 2 type 1 Initial data size 2 Byte Technical data digital outputs Number of outputs 16 Cable length shielded 1000 m Cable length unshielded 600 m Rated...

Page 37: ...possible Actuation of digital input ü Switching frequency with resistive load max 2 5 kHz Switching frequency with inductive load max 0 5 Hz Switching frequency on lamp load max 2 5 kHz Internal limitation of inductive shut off voltage L 52 V Short circuit protection of output yes electronic Trigger level 1 A Number of operating cycle of relay outputs Switching capacity of contacts Output data siz...

Page 38: ...erational limit of resistor ranges Operational limit of resistor ranges with SFU Basic error limit Basic error limit with SFU Destruction limit resistance inputs Resistance thermometer inputs Resistance thermometer ranges Operational limit of resistance thermometer ranges Operational limit of resistance thermometer ranges with SFU Basic error limit thermoresistor ranges Basic error limit thermores...

Page 39: ...d load voltage Current consumption from load voltage L without load Voltage output short circuit protection Voltage outputs Min load resistance voltage range Max capacitive load current range Max inductive load current range Output voltage ranges Operational limit of voltage ranges Basic error limit voltage ranges with SFU Destruction limit against external applied voltage Current outputs Max in l...

Page 40: ...ction ü Mode pulse ü Mode frequency counter ü Mode period measurement ü Gate input available ü Latch input available ü Reset input available Counter output available ü Load and working memory Load memory integrated 512 KB Load memory maximum 512 KB Work memory integrated 128 KB Work memory maximal 512 KB Memory divided in 50 program 50 data ü Memory card slot MMC Card with max 1 GB Hardware config...

Page 41: ...difference between circuits DC 75 V AC 50 V Max potential difference between inputs Ucm Max potential difference between Mana and Mintern Uiso Max potential difference between inputs and Mana Ucm Max potential difference between inputs and Mintern Uiso Max potential difference between Mintern and outputs Insulation tested with DC 500 V Command processing times Bit instructions min 0 02 µs Word ins...

Page 42: ...ock synchronization ü Synchronization via MPI Master Slave Synchronization via Ethernet NTP no Address areas I O Input I O address area 1024 Byte Output I O address area 1024 Byte Input process image maximal 128 Byte Output process image maximal 128 Byte Digital inputs 8064 Digital outputs 8064 Digital inputs central 1008 Digital outputs central 1008 Integrated digital inputs 16 Integrated digital...

Page 43: ...s max 32 PWM data PWM channels 3 PWM time basis 0 1ms 1ms Period length 4 65535 1 65535 timebase Minimum pulse width 0 0 5 period Type of output Highside with 1 1kOhm pulldown Functionality Sub D interfaces Type X2 Type of interface RS485 Connector Sub D 9 pin female Electrically isolated MPI ü MP I MPI RS232 DP master DP slave Point to point interface Type X3 Type of interface RS485 Connector Sub...

Page 44: ...ation ü S7 communication ü S7 communication as server ü S7 communication as client Activation deactivation of DP slaves ü Direct data exchange slave to slave communi cation DPV1 ü Transmission speed min 9 6 kbit s Transmission speed max 12 Mbit s Number of DP slaves max 32 Address range inputs max 1 KB Address range outputs max 1 KB User data inputs per slave max 244 Byte User data outputs per sla...

Page 45: ... ü Interface isolated ü RS232 interface RS422 interface RS485 interface ü Connector Sub D 9 pin female Transmission speed min 150 bit s Transmission speed max 115 5 kbit s Cable length max 500 m Point to point protocol ASCII protocol ü STX ETX protocol ü 3964 R protocol ü RK512 protocol USS master protocol ü Modbus master protocol ü Modbus slave protocol Special protocols Functionality RJ45 interf...

Page 46: ...Rail System 300 Mechanical data Dimensions WxHxD 80 mm x 125 mm x 120 mm Weight 420 g Environmental conditions Operating temperature 0 C to 60 C Storage temperature 25 C to 70 C Certifications UL certification yes VIPA System 300S Hardware description Technical data HB140 CPU SC 313 6CF13 GB 15 50 46 ...

Page 47: ...are transferred from the MMC into the work memory of the CPU If no MMC is plugged the CPU transfers permanent stored protected blocks into the work memory if available n Depending on the position of the operating mode switch the CPU switches to RUN if OB81 exists res remains in STOP This event is stored in the diagnostic buffer as Start overall reset automatically unbuffered PowerON CAUTION After ...

Page 48: ... per row may be parameterized For the project engineering of more than 8 modules line interface con nections are to be used For this you set in the hardware configurator the module IM 360 from the hardware catalog to slot 3 of your 1 pro file rail Now you may extend your system with up to 3 profile rails by starting each with an IM 361 from Siemens at slot 3 You may access the modules with read re...

Page 49: ...t Sub module Default address Access Assignment DI16 DO16 124 Byte Digital Input I 0 0 I 0 7 125 Byte Digital Input I 1 0 I 1 7 Counter 768 DInt Channel 0 Count value Frequency value 772 DInt Channel 1 Count value Frequency value Example for automatic address allocation Input range VIPA System 300S Deployment CPU 313 6CF13 Address assignment HB140 CPU SC 313 6CF13 GB 15 50 49 ...

Page 50: ...ATIC Manager and the Siemens hardware configurator is required Please consider that this SPEED7 CPU has 4 ACCUs After an arithmetic operation I I I I D D D D MOD R R R R the content of ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2 This may cause conflicts in applications that presume an unmodified ACCU 2 For more information may be found in the manual VIPA Operation list SPEED7 at Differences betw...

Page 51: ...e IM 361 Bus extensions are always placed at slot 3 5 7 Hardware configuration Ethernet PG OP channel The CPU 313 6CF13 has an integrated Ethernet PG OP channel This channel allows you to program and remote control your CPU The PG OP channel also gives you access to the internal web page that contains information about firmware version connected I O devices current cycle times etc With the first s...

Page 52: ...ton or type in the MAC Address The Mac address may be found at the 1 label beneath the front flap of the CPU 4 Choose if necessary the known MAC address of the list of found stations 5 Either type in the IP configuration like IP address subnet mask and gateway 6 Confirm with Assign IP configuration ð Direct after the assignment the Ethernet PG OP channel may be reached online by these address data...

Page 53: ...h Object proper ties of the CPU 313C 2DP during hardware configuration Via a double click on the CPU 313C 2DP the parameter window of the CPU may be accessed Using the registers you get access to every parameter of the CPU Description of the parameters of the sub modules DI16 DO16 and Counter Ä Chapter 6 Deployment I O periphery on page 96 5 8 2 CPU parameters The CPU does not evaluate each parame...

Page 54: ...oring time for ready message by modules 100ms This operation specifies the maximum time for the ready message of every configured module after PowerON Here connected PROFIBUS DP slaves are also considered until they are parame terized If the modules do not send a ready message to the CPU by the time the monitoring time has expired the actual configura tion becomes unequal to the preset configurati...

Page 55: ...ards Each S7 timer occupies 2bytes n Number of S7 Counters from C0 Enter the number of retentive S7 counter from C0 onwards n Areas This parameter is not supported n Priority Here the priorities are displayed according to which the hardware interrupt OBs are processed hardware interrupt time delay inter rupt async error interrupts n Priority The priority may not be modified n Active Activate the c...

Page 56: ...tection level 2 with password Authorized users read and write access Unauthorized user read access only Protection level 3 Authorized users read and write access Unauthorized user no read and write access 5 9 Setting VIPA specific CPU parameters 5 9 1 Proceeding Except of the VIPA specific CPU parameters the CPU parametriza tion takes place in the parameter dialog of the CPU 313C 2DP from Siemens ...

Page 57: ...k directory The SPEEDBUS GSD is stored in the directory VIPA_System_300S 5 Start the hardware configurator from Siemens 6 Close every project 7 Select Options è Install new GSD file 8 Navigate to the directory VIPA_System_300S and select SPEEDBUS GSD an ð The SPEED7 CPUs and modules of the System 300S from VIPA may now be found in the hardware catalog at PROFIBUS DP Additional field devices I O VI...

Page 58: ...fic parameters The following parameters may be accessed by means of the proper ties dialog of the VIPA CPU 5 9 2 1 Function RS485 X3 Using this parameter the RS485 interface may be switched to PtP communication point to point respectively the synchronization between DP master system and CPU may be set Deactivated Deactivates the RS485 interface PtP With this operating mode the PROFIBUS DP master i...

Page 59: ...In PROFIBUS DP SyncInOut mode CPU and DP master system are waiting on each other and form thereby a cycle Here the whole cycle is the sum of the longest DP master cycle and CPU cycle By this synchronization mode you receive global consistent in output data since within the total cycle the same input and output data are han dled successively by CPU and DP master system If necessary the time of the ...

Page 60: ...token time for the PROFIBUS results The token time defines the duration until the token reaches the DP master again Per default this time is supervised Due to this monitoring disturbances on the bus can affect a reboot of the DP master Here with the parameter Token Watch the monitoring of the token time can be switched off respectively on Default On 5 10 Project transfer There are the following po...

Page 61: ...inated with its surge impedance For this you switch on the terminating resistor at the first and the last participant of a network or a segment Please make sure that the participants with the activated terminating resistors are always power supplied Other wise it may cause interferences on the bus 1 Connect your PC to the MPI jack of your CPU via a MPI pro gramming cable 2 Load your project in the...

Page 62: ...y to select the option Test commissioning routing 5 10 2 Transfer via Ethernet For transfer via Ethernet the CPU has the following interface n X5 Ethernet PG OP channel So that you may access the Ethernet PG OP channel you have to assign IP address parameters by means of the initialization Ä Chapter 5 7 Hardware configuration Ethernet PG OP channel on page 51 1 For the transfer connect if not alre...

Page 63: ...blinking of the MC LED of the CPU marks the active transfer Please regard that your user memory serves for enough space other wise your user program is not completely loaded and the SF LED gets on When the MMC has been installed the write command stores the content of the battery buffered RAM as S7PROG WLD on the MMC The write command is controlled by means of the block area of the Siemens SIMATIC...

Page 64: ...pkg SERIALNUMBER 02119 Order no firmware vers package serial no SUPPORTDATA PRODUCT V3118 HARDWARE Information for support Memorysizes Bytes LoadMem 524288 Work Mem Code 248968 WorkMemData 248968 Information about memory con figuration load memory work memory code data OnBoardEthernet MacAddress 0020D50144C1 IP Address 172 20 120 62 SubnetMask 255 255 255 0 Gateway 172 20 120 62 Ethernet PG OP Add...

Page 65: ...PPORTDATA PRODUCT V3290 Module Type Information for support Address Input 124 125 Configured input base addresses Address Output 124 125 Configured output base addresses Slot 204 CPU component Counter VIPA 3 COUNTERS V3 2 9 Name firmware version module type SUPPORTDATA PRODUCT V3290 Module Type Information for support Address Input 768 783 Configured input base addresses Address Output 768 783 Con...

Page 66: ...outputs are inhibited n RUN LED blinks as soon as the OB 100 is operated and for at least 3s even if the start up time is shorter or the CPU gets to STOP due to an error This indicates the start up n STOP LED off When the CPU has completed the START UP OB it assumes the operating mode RUN n The application program in OB 1 is processed in a cycle Under the control of alarms other program sections c...

Page 67: ...are monitored 6 Now you may execute the program code step by step via Debug è Execute Next Statement or run the program until the next breakpoint via Debug è Resume 7 Delete all breakpoints with the option Debug è Delete All Breakpoints n The RUN LED blinks and the STOP LED is on n The execution of the code is stopped No level is further executed n All times are frozen n The real time clock runs i...

Page 68: ...lues are put at disposal STOP RUN res PowerON general First the PII is deleted then OB 100 is called After the execution of the OB the BASP is reset and the cycle starts with Delete PIO Read PII OB 1 decentral inputs The inputs are once be read by the decen tralized station and the recent values are put at disposal RUN general The program execution happens cyclically and can therefore be foreseen ...

Page 69: ... place the CPU in STOP by the menu command PLC è Operating mode n Overall reset You may request the overall reset by means of the menu command PLC è Clean Reset In the dialog window you may place your CPU in STOP state and start the overall reset if this has not been done as yet The STOP LED blinks during the overall reset procedure When the STOP LED is on permanently the overall reset procedure h...

Page 70: ...this firmware version is different to the existing firmware version this is indicated by blinking of the LEDs and the firmware may be installed by an update request The latest firmware versions are to be found in the service area at www vipa com For example the following files are necessary for the firmware update of the CPU 313 6CF13 and its components with hardware release 1 n 313 6CF13 Hardware...

Page 71: ...e window with hardware and firm ware version may be selected ð Due to software technical reasons there is something dif ferent of the VIPA CPU 313 6CF13 to the CPU 313C 2DP from Siemens 1 VIPA order number VIPA 313 6CF13 2 Hardware release 01 3 Internal hardware version 00 4 Firmware version V3 6 0 Every register of the module information dialog is sup ported by the VIPA CPUs More about these regi...

Page 72: ... firmware file was found on the MMC 3 You start the transfer of the firmware as soon as you tip the operating mode switch downwards to MRES within 10s 4 During the update process the LEDs SF and FC are alternately blinking and MC LED is on This may last several minutes 5 The update is successful finished when the LEDs PW ST SF FC and MC are on If they are blinking fast an error occurred 6 Turn Pow...

Page 73: ... means that the RAM was deleted completely 4 For the confirmation of the resetting procedure the LEDs PW ST SF FC and MC get ON If not the factory reset has failed and only an overall reset was executed In this case you can repeat the procedure A factory reset can only be executed if the stop LED has static light for exactly 6 times 5 The end of factory reset is shown by static light of the LEDs P...

Page 74: ...the CPU checks if there is a pkg file firmware file If exists this is indicated by blinking of the LEDs and the firmware may be installed by an update request n Once in STOP If a storage medium is put which contains a command file VIPA_CMD MMC the command file is loaded and the con taining instructions are executed 5 17 Memory extension with MCC There is the possibility to extend the work memory o...

Page 75: ... is entered into the diagnostic buffer You may reset the memory config uration of your CPU to the initial status at any time by executing an overall reset without MCC 5 18 Extended know how protection Besides the standard Know how protection the SPEED7 CPUs from VIPA provide an extended know how protection that serves a secure block protection for accesses of 3 persons The standard protection from...

Page 76: ...G 3 persons may access protected blocks but only the block header is transferred to the PG The block code that is to be protected remains in the CPU and cannot be read Protected blocks in the RAM of the CPU may be substituted at any time by blocks with the same name This change remains up to next overall reset Protected blocks may permanently be overwritten only if these are deleted at the protect...

Page 77: ...ecuted command a diagnostics entry may be found in the diagnostics buffer Please regard the command sequence is to be started with CMD_START and ended with CMD_END Command Description Diagnostics entry CMD_START In the first line CMD_START is to be located 0xE801 There is a diagnostic entry if CMD_START is missing 0xE8FE WAIT1SECOND Waits about 1 second 0xE803 WEBPAGE The current web page of the C...

Page 78: ...iagbuff txt 0xE80B CMD_END Marks the end of the command sequence 0xE802 arbitrary text Text after the command CMD_END is not evaluated Example 2 CMD_START Marks the start of the command sequence 0xE801 LOAD_PROJECT proj2 wld Execute an overall reset and load proj2 wld 0xE805 WAIT1SECOND Wait ca 1s 0xE803 WAIT1SECOND Wait ca 1s 0xE803 IP parameter 0xE80E SET_NETWORK 172 16 129 210 255 255 224 0 172...

Page 79: ...nformation in the Siemens SIMATIC Manager Via the register Diagnostic Buffer you reach the diagnostic window The diagnosis is independent from the operating mode of the CPU You may store a max of 100 diagnostic entries in the CPU The fol lowing page shows an overview of the VIPA specific Event IDs Overview of the Event IDs Event ID Description 0x115C Vendor specific interrupt OB 57 at EtherCAT OB ...

Page 80: ... to the master ZInfo2 Slot of the master 32 page frame master 0xE016 Maximum block size at master transfer exceeded ZInfo1 Periphery address ZInfo2 Slot 0xE017 Error at access to integrated slave 0xE018 Error at mapping of the master periphery 0xE019 Error at standard back plane bus system recognition 0xE01A Error at recognition of the operating mode 8 9 bit 0xE01B Error Maximum number of plug in ...

Page 81: ...ing of the i slave diagnostics 0xE0CF Timeout at loading of a new HW configuration timeout 39 seconds 0xE100 Memory card access error 0xE101 Memory card error file system 0xE102 Memory card error FAT 0xE104 Memory card error at saving 0xE200 Memory card writing finished Copy Ram2Rom 0xE210 Memory card reading finished reload after overall reset 0xE21E Memory card reading Error at reload after over...

Page 82: ...tline 0xE721 Internal error Please contact the VIPA Hotline 0xE801 CMD Auto command CMD_START recognized and successfully executed 0xE802 CMD Auto command CMD_End recognized and successfully executed 0xE803 CMD Auto command WAIT1SECOND recognized and successfully exe cuted 0xE804 CMD Auto command WEBPAGE recognized and successfully executed 0xE805 CMD Auto command LOAD_PROJECT recognized and succe...

Page 83: ... ERROR 2 BUSY 3 TIMEOUT 4 LOCKED 5 UNKNOWN 0xEA04 SBUS Multiple parametrization of a periphery address ZInfo1 Periphery address ZInfo2 Slot ZInfo3 Data width 0xEA05 Internal error Please contact the VIPA Hotline 0xEA07 Internal error Please contact the VIPA Hotline 0xEA08 SBUS Parametrized input data width unequal to plugged input data width ZInfo1 Parametrized input data width ZInfo2 Slot ZInfo3 ...

Page 84: ... configured 0xEA21 Error Configuration RS485 interface X2 X3 PROFIBUS DP master is configured but missing ZInfo2 Interface x 0xEA22 Error RS485 interface X2 Value exceeds the limits ZInfo Configured value of X2 0xEA23 Error RS485 interface X3 Value exceeds the limits ZInfo Configured value of X3 0xEA24 Error Configuration RS485 interface X2 X3 Interface protocol missing default settings are used Z...

Page 85: ...therCAT CP Configuration error Zinfo1 Bit 0 Too many devices Bit 1 Too many devices per ms Bit 2 Too many input bytes per ms Bit 3 Too many output bytes per ms Bit 4 Too many input bytes per device Bit 5 Too many output bytes per device Bit 6 Too many productive connections Bit 7 Too many input bytes in the process image Bit 8 Too many output bytes in the process image Bit 9 Configuration not avai...

Page 86: ...andle ZInfo3 Internal error code for service purposes 0xEA68 Error PROFINET IO controller writing record set PK Error type 0 DATA_RECORD_ERROR_LOCAL 1 DATA_RECORD_ERROR_STACK 2 DATA_RECORD_ERROR_REMOTE OBNo PROFINET IO controller slot DatId Device No ZInfo1 Record set number ZInfo2 Record set handle ZInfo3 Internal error code for service purposes 0xEA69 Internal error Please contact the VIPA Hotli...

Page 87: ...slot OBNo PLC Mode DatId 0 ZInfo1 Device ID ZInfo2 ZInfo3 0xEA6D PROFINET IO controller No empty name PK Rackslot OBNo PLC Mode DatId 0 ZInfo1 Device ID ZInfo2 ZInfo3 0xEA6E PROFINET IO controller RPC response missing PK Rackslot OBNo PLC Mode DatId 0 ZInfo1 Device ID ZInfo2 ZInfo3 VIPA System 300S Deployment CPU 313 6CF13 VIPA specific diagnostic entries HB140 CPU SC 313 6CF13 GB 15 50 87 ...

Page 88: ...tream was cut off sending failed 3 Exhausted retries 4 No receive buffer available in Emac DMA 5 Emac DMA transfer aborted 6 Queue overflow 7 Unexpected frame received ZInfo3 Number of errors which occurred 0xEAB0 Link mode not valid OBNo Current PLC mode ZInfo1 Diagnostics address master controller Zinfo2 Current LinkMode 0x01 10Mbit full duplex 0x02 100Mbit half duplex 0x03 100Mbit full duplex 0...

Page 89: ..._MAPPING_ERROR 12 ERROR 0xEC04 EtherCAT Multiple configuration of a periphery address ZInfo1 Periphery address ZInfo2 Slot 0xEC10 EtherCAT Restoration bus with its slaves OB start Info Local data StartEvent and Eventclass 0xEC10 DatID 0xXXYY XX 0x54 with input address in ZInfo1 XX 0x55 with output address YY 0x00 Station not available YY 0x01 Station available process data ZInfo1 0xXXYY XX OldStat...

Page 90: ...able YY 0x01 Station available process data ZInfo1 0xXXYY XX OldState YY NewState ZInfo2 Diagnostics of the Station ZInfo3 AlStatusCode 0xEC30 EtherCAT Topology OK OB start Info Local data StartEvent and Eventclass 0xEC30 ZInfo2 Diagnostics address of the master 0xEC50 EtherCAT DC not in Sync ZInfo1 Diagnostics address of the master 0xED10 EtherCAT Bus failure OB start Info Local data StartEvent a...

Page 91: ...tput address YY 0x00 Station not available YY 0x01 Station available process data ZInfo1 0xXXYY XX OldState YY NewState ZInfo2 Diagnostics address of the master ZInfo3 Number of stations which are not in the same state as the master 0xED21 EtherCAT error in bus state change OB 0x00 PK 0x00 DatID 0xXXYY XX 0x54 with input address in ZInfo1 XX 0x55 with output address YY 0x00 Station not available Y...

Page 92: ...class 0xED30 ZInfo2 Diagnostics address of the master 0xED31 EtherCAT Interrupt Queue Overflow OB start Info Local data StartEvent and Eventclass 0xED31 ZInfo2 Diagnostics address of the master 0xED40 0xED4F Internal error Please contact the VIPA Hotline 0xED50 EtherCAT DC not in Sync ZInfo1 Diagnostics address of the master 0xED60 EtherCAT Diagnostics buffer CP Slave state change PK 0 OB PLC Mode...

Page 93: ...gh byte DatID 1 2 Subindex ZInfo1 Index ZInfo2 SDO error code high word ZInfo3 SDO error code low word 0xED70 EtherCAT Diagnostics buffer CP Twice HotConnect group found PK 0 OB PLC Mode DatID 1 2 0 ZInfo1 Diagnostics address of the master ZInfo2 EtherCAT station address ZInfo3 0 0xEE00 Additional information at UNDEF_OPCODE 0xEE01 Internal error Please contact the VIPA Hotline 0xEEEE CPU was comp...

Page 94: ... processing of statuses does not change the execution of the program It only shows that the data displayed is no longer valid At the breakpoint the CPU stops collecting data for the status display and instead of the required data it only provides the PG with data containing the value 0 For this reason jumps or time and process alarms can result in the value displayed during program execution remai...

Page 95: ... C and D The process image of binary and digital operands is modified independently of the operating mode of the CPU When the operating mode is RUN the program is executed with the modified process variable When the program con tinues they may however be modified again without notifica tion Process variables are controlled asynchronously to the execu tion sequence of the program VIPA System 300S D...

Page 96: ...ological functions and standard I Os may be used simultaneously with appropriate hardware Read access to inputs used by technological functions is possible Write access to used outputs is not possible Up to 3 channels may be parameterized as technological function The parameterization of the appropriate channel is made in the hard ware configurator by the count submodule of the CPU 313C 2DP There ...

Page 97: ... Input 16xDC 24V with interrupt capability n Digital Output 16xDC 24V 0 5A n Technological functions 3 channels X11 CAUTION Please regard that the voltage at an output channel is always the supply voltage connected to L Overview VIPA System 300S Deployment I O periphery In Output area CPU 313 6CF13 HB140 CPU SC 313 6CF13 GB 15 50 97 ...

Page 98: ...nel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 Channel 2 A Pulse 9 I 0 7 Channel 2 B Direction 10 not used 11 not used 12 I 1 0 Channel 2 HW gate 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Latch 18 I 1 6 Channel 2 Latch 19 I 1 7 20 Ground 1M DI VIPA System 300S Deployment I O periphery In Output area CPU 313 6CF13 HB140 CPU SC 313 6CF13 GB 15 50 98 ...

Page 99: ...ssignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 Channel 2 Output 25 Q 0 3 26 Q 0 4 27 Q 0 5 28 Q 0 6 29 Q 0 7 30 Ground 2M DO 31 3L Power supply DC 24V 32 Q 1 0 33 Q 1 1 34 Q 1 2 35 Q 1 3 36 Q 1 4 37 Q 1 5 38 Q 1 6 39 Q 1 7 40 Ground 3M DO VIPA System 300S Deployment I O periphery In Output area CPU 313 6CF13 HB140 CPU SC 313 6...

Page 100: ...Digital Input I 1 0 I 1 7 Counter 768 DInt Channel 0 Count value Frequency value 772 DInt Channel 1 Count value Frequency value 776 DInt Channel 2 Count value Frequency value 780 DInt reserved Sub module Default address Access Assignment DI16 DO16 124 Byte Digital Output Q 0 0 Q 0 7 125 Byte Digital Output Q 1 0 Q 1 7 Counter 768 DWort reserved 772 DWort reserved 776 DWort reserved 780 DWort reser...

Page 101: ...nt 1 1L Power supply DC 24V 2 I 0 0 Channel 0 A Pulse 3 I 0 1 Channel 0 B Direction 4 I 0 2 Channel 0 HW gate 5 I 0 3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 Channel 2 A Pulse 9 I 0 7 Channel 2 B Direction 10 not used 11 not used 12 I 1 0 Channel 2 HW gate 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Latch 18 I 1 6 Channel 2 Latch...

Page 102: ...d Pin assignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 Channel 2 Output 25 Q 0 3 26 Q 0 4 27 Q 0 5 28 Q 0 6 29 Q 0 7 30 Ground 2M DO 31 3L Power supply DC 24V 32 Q 1 0 33 Q 1 1 34 Q 1 2 35 Q 1 3 36 Q 1 4 37 Q 1 5 38 Q 1 6 39 Q 1 7 40 Ground 3M DO VIPA System 300S Deployment I O periphery Digital part HB140 CPU SC 313 6CF13 GB 1...

Page 103: ...dress assignment Sub module Default address Access Assignment DI16 DO16 124 Byte Digital Input I 0 0 I 0 7 125 Byte Digital Input I 1 0 I 1 7 Counter 768 DInt Channel 0 Count value Frequency value 772 DInt Channel 1 Count value Frequency value 776 DInt Channel 2 Count value Frequency value 780 DInt reserved Sub module Default address Access Assignment DI16 DO16 124 Byte Digital Output Q 0 0 Q 0 7 ...

Page 104: ...l in groups of four Please note that in the parameter window only the value 0 1ms may be set At the other values 0 35ms is internally used for input delay There are no parameters for the digital output channels 6 5 Counter 6 5 1 Counter Fast introduction The CPU 313 6CF13 has in outputs which may be used for techno logical functions respectively as standard periphery Technological functions and st...

Page 105: ... of the CPU 5 As soon as an operating mode to the corresponding channel is selected a dialog window for this operating mode is created and displayed and filled with default parameters 6 Execute the wished parameterization 7 Save the project with Station è Save and compile 8 Transfer the project to the CPU The SFB COUNT SFB 47 should cyclically be called e g OB 1 for controlling the counter functio...

Page 106: ...l inputs are available at the same time you may set the input assignment for every counter via the parameterization For each counter the following inputs are available n Channelx A Pulse input for count signal res track A of an encoder Here you may connect encoder with 1 2 or 4 tier evaluation n Channelx B Direction signal res track B of the encoder Via the parameteriza tion you may invert the dir...

Page 107: ...may be selected You have the following options n None There is no interrupt triggered n Process The counting function triggers a hardware interrupt n Diagnostics and Process With the CPU 313 6CF13 the diagnostic interrupt of the digital in output periphery is only supported in con nection with hardware interrupt lost Parameters Description Range of values Default Main count direc tion n None No re...

Page 108: ...A pulse track B direction and hardware gate signals in fixed steps 60 30 10 5 2 1kHz 60kHz max frequency Latch You can set the maximum frequency of the latch signal in fixed steps 60 30 10 5 2 1kHz 10kHz Signal evaluation The count and direction signals are connected to the input A rotary transducer is connected to the input single dual or quadruple evaluation n Pulse Direc tion n Rotary encoder s...

Page 109: ...acteristics of the output is not no comparison n activated n deactivated deactivated Hardware inter rupt Overflow In the activated state a hardware interrupt is generated in the event of an overflow exceeding the upper count limit n activated n deactivated deactivated Hardware inter rupt Underflow In the activated state a hardware interrupt is generated in the event of an underflow undershooting t...

Page 110: ...L 12 1 FALSE Status of the hardware gate STS_LTCH BOOL 12 2 FALSE Status of the latch input STS_DO BOOL 12 3 FALSE Status of the output STS_C_DN BOOL 12 4 FALSE Status of the down count Always indicates the last direction of count After the first SFB call STS_C_DN is set FALSE STS_C_UP BOOL 12 5 FALSE Status of the up count Always indicates the last direction of count After the first SFB call STS_...

Page 111: ... start counting JOB_OVAL DINT 28 0 Output value for read request RES10 BOOL 32 0 FALSE reserved RES11 BOOL 32 1 FALSE reserved RES_STS BOOL 32 2 FALSE Reset status bits Resets the status bits STS_CMP STS_OFLW STS_ZP The SFB must be twice called to reset the status bit Reset with RES_STS Per channel you may call the SFB in each case with the same instance DB since the data necessary for the interna...

Page 112: ...o after a CPU STOP RUN transition 2 Call the SFB The job is processed immediately JOB_DONE only applies to SFB run with the result FALSE JOB_ERR TRUE if an error occurred Details on the error cause are indi cated at JOB_STAT Name Data type Address DB Default Comment JOB_DONE BOOL 22 0 TRUE New job can be started JOB_ERR BOOL 22 1 FALSE Job error JOB_STAT WORD 24 0 0000h Job error ID 0000h No error...

Page 113: ...646 231 2 Writing comparison value 2147483648 231 2147483647 231 1 Writing hysteresis 0 255 Writing pulse duration 0 510ms Single periodic count main count direction up Job Valid range End value 2 2147483646 231 1 Writing counter directly 2147483648 231 end value 2 Writing the load value 2147483648 231 end value 2 Writing comparison value 2147483648 231 end value 1 Writing hysteresis 0 255 Writing...

Page 114: ...d process interrupt Via the parameterization you have the opportunity to define a main counting direction for every counter If none is chosen the complete counting range is available Limits Valid value range Lower count limit 2 147 483 648 231 Upper count limit 2 147 483 647 231 1 Main counting direction forward Upper restriction of the count range The counter counts 0 res load value in positive d...

Page 115: ...647 231 1 With overflow or underflow the status bits STS_OFLW respectively STS_UFLW are set These bits remain set until these are reset with RES_STS If enabled additionally a process interrupt is triggered No main counting direction n The counter counts once starting with the load value n You may count forward or backwards n The count limits are set to the maximum count range n At over or underflo...

Page 116: ...nd value 1 in positive direction it jumps to the load value at the next positive count pulse and the gate is automatically closed n To restart the count process you must create a positive edge of the gate The counter starts with the load value Limits Valid value range Limit value 2 147 483 647 231 1 to 2 147 483 647 231 1 Lower count limit 2 147 483 648 231 VIPA System 300S Deployment I O peripher...

Page 117: ...ter starts with the load value Limits Valid value range Limit value 2 147 483 648 231 to 2 147 483 646 231 2 Upper count limit 2 147 483 647 231 1 No main counting direction n The counter counts forward or backwards starting with the load value n At over or underrun at the count limits the counter jumps to the according other count limit and counts from there on n The count limits are set to the m...

Page 118: ...sitive count pulse Limits Valid value range Limit value 2 147 483 647 231 1 to 2 147 483 647 231 1 Lower count limit 2 147 483 648 231 Main counting direction backwards n The counter counts backwards starting with the load value n When the counter reaches the end value 1 in negative direction it jumps to the load value at the next negative count pulse n You may exceed the upper count limit VIPA Sy...

Page 119: ... in the latch register n Comparison You may set a comparison value that activates res de activates a digital output res releases a hardware interrupt depending on the counter value n Hysteresis The setting of a hysteresis avoids for example a high output tog gling when the value of an encoder signal shifts around a compar ison value The illustration shows how the additional functions influence the...

Page 120: ... at hardware gatex input of the module SW gate open activate In application program by setting SW_GATE of the SFB 47 close deactivate In application program by reset ting SW_GATE of the SFB 47 The parameterization defines if the gate cancels or stops the counter process n At cancel function the counter starts counting with the load value after gate restart Gate function Gate function cancel and st...

Page 121: ...ardware gate Gate control via SW gate canceling HW gate deactivated gate function Cancel count SW gate HW gate Reaction Counter edge 0 1 deactivated Restart with load value Gate control via SW gate stopping HW gate deactivated gate function Stop count SW gate HW gate Reaction Counter edge 0 1 deactivated Continue Gate control abort interruption VIPA System 300S Deployment I O periphery Counter Cou...

Page 122: ...rocess an edge 0 1 is recognized at the Latch input of a counter the recent counter value is stored in the according latch register The latch value may be accessed by the parameter LATCHVAL of the SFB 47 A just in LATCHVAL loaded value remains after a STOP RUN transition In the CPU a comparison value may be stored that is assigned to the digital output to the status bit Status Comparator STS_CMP a...

Page 123: ...n condition is no longer fulfilled With pulse time 0 the output is as set as the comparison condition is fulfilled Pulse duration For adaptation to the used actors a pulse duration may be speci fied The pulse duration defines how long the output should be set It may be preset in steps of 2ms between 0 and 510ms The pulse duration starts with the setting of the according digital output The inaccura...

Page 124: ...active 7 Leave hysteresis range output remains set for counter value comparison value With reaching the comparison condition the hysteresis gets active At active hysteresis the comparison result remains unchanged until the counter value leaves the set hysteresis range After leaving the hyste resis range a new hysteresis is only activated with again reaching the comparison conditions Effect at coun...

Page 125: ...se of the parameterized pulse duration is put out the hysteresis is activated and the counting direction stored 2 Leaving the hysteresis range contrary to the stored counting direc tion pulse of the parameterized pulse duration is put out the hysteresis is de activated 3 Counter value comparison value pulse of the parameterized pulse duration is put out the hysteresis is activated and the counting...

Page 126: ...set the integration time in the parameter assignment screen forms or you can edit them in the job interface of the SFB FREQUENC SFB 48 1 Integration time 2 Count pulse 3 Internal gate SW gate 4 Start of frequency measurement 5 Stop of frequency measurement The measurement is carried out during the integration time and is updated after the integration time has expired If the period of the measured ...

Page 127: ...hannel 0 A Pulse 3 I 0 1 Channel 0 B Direction 4 I 0 2 Channel 0 HW gate 5 I 0 3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 Channel 2 A Pulse 9 I 0 7 Channel 2 B Direction 10 not used 11 not used 12 I 1 0 Channel 2 HW gate 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Latch 18 I 1 6 Channel 2 Latch 19 I 1 7 20 Ground 1M DI VIPA System...

Page 128: ...ponding channel a dialog window for the fre quency measurement is created and displayed and filled with default parameters 6 Execute the wished parameterization 7 Store the project with Station è Save and compile 8 Transfer the project to the CPU In the following the parameters are listed which may be used for fre quency measurement configuration during hardware configuration Parameters which are ...

Page 129: ...he frequency measurement n The SFB is to be called with the corresponding instance DB Here the parameters of the SFB are stored n Among others the SFB 48 contains a request interface Hereby you get read and write access to the registers of the frequency meter n So that a new job may be executed the previous job must have be finished with JOB_DONE TRUE n Per channel you may call the SFB in each cas...

Page 130: ...Address Instance DB Default Comment JOB_OVAL DINT 28 0 Output value for read request Per channel you may call the SFB in each case with the same instance DB since the data necessary for the internal operational are stored here Writing accesses to outputs of the instance DB is not permissible To read write the registers of the frequency meter the request inter face of the SFB 48 may be used So that...

Page 131: ...0h Job error ID 0000h No error 0221h Integration time too low 0222h Integration time too high 02FFh Invalid job ID 8001h Parameter error 8009h Channel no not valid 1 A new job may be started with JOB_DONE TRUE 2 A value to be read of a read job may be found in JOB_OVAL in the instance DB at address 28 8009h and Parameter error 8001h If you have preset a CHANNEL number greater than 3 the error Chan...

Page 132: ...lse break ratio and issues it via the according output channel 1 Period duration 2 ON delay 3 Pulse duration 4 Pulse pause During pulse width modulation the count function at the same channel is deactivated For pulse width modulation connect your actuators to the following pins n Channel 0 Pin 22 n Channel 1 Pin 23 n Channel 2 Pin 24 Connect the common ground to pin 30 PWM PWM Outputs VIPA System ...

Page 133: ...supply DC 24V 32 Q 1 0 33 Q 1 1 34 Q 1 2 35 Q 1 3 36 Q 1 4 37 Q 1 5 38 Q 1 6 39 Q 1 7 40 Ground 3M DO Status indication X11 DO n 2L 3L LED green Supply voltage available for DO n 0 7 LEDs green Q 0 0 Q 0 7 Q 1 0 Q 1 7 The according LED is on at active output n F LED red Overload or short circuit error VIPA System 300S Deployment I O periphery Pulse width modulation PWM Overview HB140 CPU SC 313 6C...

Page 134: ...tion Parameters which are not listed here are ignored by the CPU Here the short description of the counter function may be found At Comment information about the module such as purpose may be entered Here the start address of the counter function is set Here the interrupts the counter function should trigger may be selected You have the following options n None There is no interrupt triggered n Pr...

Page 135: ...ay time between the start of an output sequence and the output of the pulse The pulse sequence is output on the output channel after the on delay has expired n Range of values 0 65535ms respectively 0 6553 5ms Period Period duration n With the period duration the length of the output sequence pulse duration pulse pause is defined n Range of values 1 65535ms respectively 0 4 6553 5ms n Default valu...

Page 136: ...lowing functional options Start Stop the pulse width modulation via software gate SW_GATE Enabling controlling of the PWM output Read status bits Request to read write internal registers of the pulse width mod ulation Name Declara tion Data type Address Inst DB Default value Comment LADDR INPUT WORD 0 0 300h This parameter is not evalu ated Always the internal I O periphery is addressed CHANNEL IN...

Page 137: ...ONE TRUE The deployment of the request interface takes place at the following sequence Edit the following input parameters Name Data type Address DB Default Comment JOB_REQ BOOL 8 0 FALSE Initiates the job edges 0 1 JOB_ID WORD 10 0 0 Job ID 00h Job without function 01h write period duration 02h write on delay 04h write minimum pulse duration 81h read period duration 82h read on delay 84h read min...

Page 138: ... job may be found in JOB_OVAL in the instance DB at address 28 If you have preset a CHANNEL number greater than 3 the error Channel no not valid 8009h is reported if you have preset a CHANNEL number greater than the maximum channel number of the CPU Parameter error 8001h is reported The pulse width modulation is controlled by the internal gate I gate The I gate is identical to the software gate SW...

Page 139: ...ted and Diagnostics Process is set in the basic parameters A process interrupt causes a call of the OB 40 Within the OB 40 you may find the logical basic address of the module that initialized the process interrupt by using the Local word 6 More detailed information about the initializing event is to find in the local double word 8 Local double word 8 of OB 40 at counter function Local byte Bit 7 ...

Page 140: ...ent Local byte Bit 7 0 8 n Bit 0 Edge at I 0 0 n Bit 1 Edge at I 0 1 n Bit 2 Edge at I 0 2 n Bit 3 Edge at I 0 3 n Bit 4 Edge at I 0 4 n Bit 5 Edge at I 0 5 n Bit 6 Edge at I 0 6 n Bit 7 Edge at I 0 7 9 n Bit 0 Edge at I 1 0 n Bit 1 Edge at I 1 1 n Bit 2 Edge at I 1 2 n Bit 3 Edge at I 1 3 n Bit 4 Edge at I 1 4 n Bit 5 Edge at I 1 5 n Bit 6 Edge at I 1 6 n Bit 7 Edge at I 1 7 10 n Bit 0 End of mea...

Page 141: ...If a channel where currently a diagnostic interruptincoming is pro cessed res interim stored initializes further process interrupts these get lost When a process interrupt for which a diagnostic inter ruptincoming has been released is ready the diagnostic interrupt pro cessing is called again as diagnostic interruptoutgoing All events of a channel between diagnostic interruptincoming and diagnosti...

Page 142: ...0 fix 3 n Bit 5 0 0 fix n Bit 6 Process interrupt lost n Bit 7 0 fix After the removing error a diagnostic messageoutgoing takes place if the diagnostic interrupt release is still active Byte Bit 7 0 0 n Bit 0 set at module failure n Bit 1 0 fix n Bit 2 set at external error n Bit 3 set at channel error n Bit 7 4 0 fix 1 n Bit 3 0 Module class 0101b Analog 1111b Digital n Bit 4 Channel information...

Page 143: ... 0 4 I 0 7 n Bit 2 Error in channel group 2 I 1 0 I 1 3 n Bit 3 Error in channel group 2 I 1 4 I 1 7 n Bit 4 Error in channel group 4 counter 0 n Bit 5 Error in channel group 5 counter 1 n Bit 6 Error in channel group 6 counter 2 n Bit 7 reserved 8 Diagnostic interrupt due to process interrupt lost at n Bit 0 input I 0 0 n Bit 1 0 fix n Bit 2 input I 0 1 n Bit 3 0 fix n Bit 4 input I 0 2 n Bit 5 0...

Page 144: ...r underflow end value counter 0 n Bit 5 0 fix n Bit 6 counter 0 reached comparison value n Bit 7 0 fix 13 Diagnostic interrupt due to process interrupt lost at n Bit 0 gate counter 1 closed n Bit 1 0 fix n Bit 2 gate counter 1 opened n Bit 3 0 fix n Bit 4 over underflow end value counter 1 n Bit 5 0 fix n Bit 6 counter 1 reached comparison value n Bit 7 0 fix 14 Diagnostic interrupt due to process...

Page 145: ...t 2 Error in channel group 2 I 1 0 I 1 3 n Bit 3 Error in channel group 2 I 1 4 I 1 7 n Bit 4 Error in channel group 4 Frequency meter 0 n Bit 5 Error in channel group 5 Frequency meter 1 n Bit 6 Error in channel group 6 Frequency meter 2 n Bit 7 reserved 8 Diagnostic interrupt due to process interrupt lost at n Bit 0 input I 0 0 n Bit 1 0 fix n Bit 2 input I 0 1 n Bit 3 0 fix n Bit 4 input I 0 2 ...

Page 146: ...urement channel 0 End of integration time n Bit 7 1 0 fix 13 Diagnostic interrupt due to process interrupt lost at n Bit 0 End of measurement channel 1 End of integration time n Bit 7 1 0 fix 14 Diagnostic interrupt due to process interrupt lost at n Bit 0 End of measurement channel 2 End of integration time n Bit 7 1 0 fix 15 reserved The record set 1 contains the 4byte of the record set 0 and ad...

Page 147: ...4 I 1 7 n Bit 7 4 reserved 8 Diagnostic interrupt due to process interrupt lost at n Bit 0 input I 0 0 n Bit 1 0 fix n Bit 2 input I 0 1 n Bit 3 0 fix n Bit 4 input I 0 2 n Bit 5 0 fix n Bit 6 input I 0 3 n Bit 7 0 fix 9 Diagnostic interrupt due to process interrupt lost at n Bit 0 input I 0 4 n Bit 1 0 fix n Bit 2 input I 0 5 n Bit 3 0 fix n Bit 4 input I 0 6 n Bit 5 0 fix n Bit 6 input I 0 7 n B...

Page 148: ... Bit 0 input I 1 4 n Bit 1 0 fix n Bit 2 input I 1 5 n Bit 3 0 fix n Bit 4 input I 1 6 n Bit 5 0 fix n Bit 6 input I 1 7 n Bit 7 0 fix 12 15 reserved VIPA System 300S Deployment I O periphery Diagnostic and interrupt Diagnostic interrupt HB140 CPU SC 313 6CF13 GB 15 50 148 ...

Page 149: ...partner station The protocols USS and Modbus allow to evaluate the receipt telegram by calling the FC SFC 218 SER_RCV after SER_SND The FCs SFCs are included in the con signment of the CPU The following FCs SFCs are used for the serial communication FC SFC Description FC SFC 216 SER_CFG RS485 parameterize FC SFC 217 SER_SND RS485 send FC SFC 218 SER_RCV RS485 receive 7 2 Principle of the data tran...

Page 150: ...for PtP Per default the RS485 interface X3 of the CPU is used for the PROFIBUS DP master Via hardware configuration the RS485 inter faces may be switched to point to point communication via the Parameter Function RS485 X3 of the Properties Since the VIPA specific CPU parameters may be set the installation of the SPEEDBUS GSD from VIPA in the hardware catalog is neces sary The CPU may be configured...

Page 151: ...Profibus 3 Download the file Cx000023_Vxxx 4 Extract the file to your work directory The SPEEDBUS GSD is stored in the directory VIPA_System_300S 5 Start the hardware configurator from Siemens 6 Close every project 7 Select Options è Install new GSD file 8 Navigate to the directory VIPA_System_300S and select SPEEDBUS GSD an ð The SPEED7 CPUs and modules of the System 300S from VIPA may now be fou...

Page 152: ...d CPU 313 6CF13 the properties dialog of the CPU may be opened As soon as the project is transferred together with the PLC user pro gram to the CPU the parameters will be taken after start up The hardware configuration which is shown here is only required if you want to customize the VIPA specific parameters 1 By double clicking the CPU 313 6CF13 placed in the slave system the properties dialog of...

Page 153: ...ion 7 4 1 FC SFC 216 SER_CFG The parametrization happens during runtime deploying the FC SFC 216 SER_CFG You have to store the parameters for STX ETX 3964R USS and Modbus in a DB RS485 Connection Description VIPA System 300S Deployment PtP communication Parametrization FC SFC 216 SER_CFG HB140 CPU SC 313 6CF13 GB 15 50 153 ...

Page 154: ... x 0 008s 154bit 9Ah Hex value is 9Ah Here you fix the protocol to be used You may choose between 1 ASCII 2 STX ETX 3 3964R 4 USS Master 5 Modbus RTU Master 6 Modbus ASCII Master At ASCII protocol this parameter is ignored At STX ETX 3964R USS and Modbus you fix here a DB that con tains the communication parameters and has the following structure for the according protocols Data block at STX ETX D...

Page 155: ... 1200baud 05h 1800baud 06h 2400baud 07h 4800baud 08h 7200baud 09h 9600baud 0Ah 14400baud 0Bh 19200baud 0Ch 38400baud 0Dh 57600baud 0Eh 115200baud Number of data bits where a character is mapped to 0 5bit 1 6bit 2 7bit 3 8bit The parity is depending on the value even or odd For parity control the information bits are extended with the parity bit that amends via its value 0 or 1 the value of all bit...

Page 156: ...r at PARITY 6 Error at STOPBITS 7 Error at FLOWCONTROL 809xh Error in FC SFC parameter value x where x 1 Error at PROTOCOL 3 Error at BAUDRATE 4 Error at CHARLENGTH 5 Error at PARITY 6 Error at STOPBITS 7 Error at FLOWCONTROL parameter is missing 8092h Access error in parameter DB DB too short 828xh Error in parameter x of DB parameter where x 1 Error 1 parameter 2 Error 2 parameter 7 5 Communicat...

Page 157: ...BYTE 124 Word where the number of the sent Bytes is stored At ASCII if data were sent by means of FC SFC 217 faster to the serial interface than the interface sends the length of data to send could differ from the DATALEN due to a buffer overflow This should be considered by the user program With STX ETX 3964R Modbus and USS always the length set in DATAPTR is stored or 0 Return values of the bloc...

Page 158: ... 1024byte 9002h Data too short 0byte 9004h Character not allowed 3964R Value Description 2000h Send ready without error 80FFh NAK received error in communication 80FEh Data transfer without acknowledgement of partner or error at acknowledgement 9000h Buffer overflow no data send 9001h Data too long 1024byte 9002h Data too short 0byte USS Error code Description 2000h Send ready without error 8080h ...

Page 159: ...slave respond 2001h Send ready negative slave respond 8080h Receive buffer overflow no space for receipt 8090h Acknowledgement delay time exceeded 80F0h Wrong checksum in respond 80FDh Length of respond too long 80FEh Wrong function code in respond 80FFh Wrong slave address in respond 9000h Buffer overflow no data send 9001h Data too long 1024byte 9002h Data too short 2byte VIPA System 300S Deploy...

Page 160: ...llustrates the structure of programming a send command for the different protocols 3964R Principles of program ming VIPA System 300S Deployment PtP communication Communication FC SFC 217 SER_SND HB140 CPU SC 313 6CF13 GB 15 50 160 ...

Page 161: ...USS Modbus ASCII STX ETX VIPA System 300S Deployment PtP communication Communication FC SFC 217 SER_SND HB140 CPU SC 313 6CF13 GB 15 50 161 ...

Page 162: ...0 BYTE 124 Word where the number of received Bytes is stored At STX ETX and 3964R the length of the received user data or 0 is entered At ASCII the number of read characters is entered This value may be different from the read telegram length This word gets an entry in case of an error The following error messages may be created depending on the pro tocol ASCII Bit Error Description 0 overrun Over...

Page 163: ...ffer Return values of the block Error code Description 0000h no error 1000h Receive buffer too small data loss 8x24h Error at FC SFC Parameter x with x 1 Error at DATAPTR 2 Error at DATALEN 3 Error at ERROR 8122h Error in parameter DATAPTR e g DB too short 809Ah Serial interface not found res interface is used by PROFIBUS 809Bh Serial interface not configured RETVAL FC SFC 218 Return value VIPA Sy...

Page 164: ... data that is in the buffer at request time in a parameterized receive data block If a tele gram is spread over various cycles the data is overwritten There is no reception acknowledgement The communication procedure has to be controlled by the concerning user application An according Receive_ASCII FB may be found within the VIPA library in the service area of www vipa com STX ETX is a simple prot...

Page 165: ... Start and End ID to the communication partner n You may work with 1 2 or no Start and with 1 2 or no End ID n If no End ID is defined all read characters are transferred to the CPU after a parameterizable character delay time Timeout As Start res End ID all Hex values from 01h to 1Fh are permissible Characters above 1Fh are ignored In the user data characters below 20h are not allowed and may cau...

Page 166: ...on The DLE duplica tion is reversed in the receiving station The 3964R procedure requires that a lower priority is assigned to the communication partner When communi cation partners issue simultaneous send commands the station with the lower priority will delay its send command The USS protocol Universelle serielle Schnittstelle universal serial interface is a serial transfer protocol defined by S...

Page 167: ...fective value IND Index BCC Block Check Character PWE Parameter value A request can be directed to a certain slave ore be send to all slaves as broadcast message For the identification of a broadcast message you have to set bit 5 to 1 in the ADR byte Here the slave addr bit 0 4 is ignored In opposite to a normal send command the broadcast does not require a telegram evaluation via FC SFC 218 SER_R...

Page 168: ... The mode selection hap pens during runtime by using the FC SFC 216 SER_CFG n ASCII mode Every byte is transferred in the 2 sign ASCII code The data are marked with a start and an end sign This causes a transparent but slow transfer n RTU mode Every byte is transferred as one character This ena bles a higher data pass through as the ASCII mode Instead of start and end sign a time control is used T...

Page 169: ...es a Modbus master can access a Modbus slave With the following Modbus function codes a Modbus master can access a Modbus slave The description always takes place from the point of view of the master Code Command Description 01h Read n bits Read n bits of master output area 0x 02h Read n bits Read n bits of master input area 1x 03h Read n words Read n words of master output area 4x 04h Read n word...

Page 170: ...k sums CRC at RTU and LRC at ASCII mode are automatically added to every telegram They are not shown in the data block Code 01h Read n bits of master output area 0x Code 02h Read n bits of master input area 1x Command telegram Slave address Function code Address 1 bit Number of bits Check sum CRC LRC 1byte 1byte 1word 1word 1word Respond telegram Slave address Function code Number of read bytes Da...

Page 171: ...d 1word max 125words Code 05h Write 1 bit to master output area 0x A status change is via Status bit with following values Status bit 0000h Bit 0 Status bit FF00h Bit 1 Command telegram Slave address Function code Address bit Status bit Check sum CRC LRC 1byte 1byte 1word 1word 1word Respond telegram Slave address Function code Address bit Status bit Check sum CRC LRC 1byte 1byte 1word 1word 1word...

Page 172: ...lease regard that the number of bits has additionally to be set in byte Command telegram Slave address Func tion code Address 1 bit Number of bits Number of bytes Data 1 byte Data 2 byte Check sum CRC LRC 1byte 1byte 1word 1word 1byte 1byte 1byte 1byte 1word max 250byte Respond telegram Slave address Function code Address 1 bit Number of bits Check sum CRC LRC 1byte 1byte 1word 1word 1word Write 1...

Page 173: ...ve n Siemens SIMATIC Manager and possibilities for the project transfer n Modbus cable connection 1 Assemble a Modbus system consisting of a CPU 31xS as Modbus master and a CPU 21xSER 1 as Modbus slave and Modbus cable 2 Execute the project engineering of the master For this you create a PLC user application with the following structure n OB 100 Call SFC 216 configuration as Modbus RTU master with...

Page 174: ...DB and error evaluation n OB 1 Call SFC 217 SER_SND for data transport from the slave CPU to the output buffer Call SFC 218 SER_RECV for the data transport from the input buffer to the CPU Allow an according error evaluation for both directions Structure for the according PLC programs for master and slave VIPA System 300S Deployment PtP communication Modbus Example communication HB140 CPU SC 313 6...

Page 175: ...VIPA System 300S Deployment PtP communication Modbus Example communication HB140 CPU SC 313 6CF13 GB 15 50 175 ...

Page 176: ...s his data areas into the address range of the CPU Project engineering in the CPU is not required Via the PROFIBUS DP master PROFIBUS DP slaves may be cou pled to the CPU The DP master communicates with the DP slaves and links up its data areas with the address area of the CPU At every POWER ON res overall reset the CPU fetches the I O map ping data from the master At DP slave failure the ER LED i...

Page 177: ...alog If necessary you have to update the hardware catalog with Options è Update Catalog For project engineering a thorough knowledge of the Siemens SIMATIC Manager and the Siemens hardware configurator is required Please consider that this SPEED7 CPU has 4 ACCUs After an arithmetic operation I I I I D D D D MOD R R R R the content of ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2 This may cause con...

Page 178: ...ering of your PROFIBUS DP master is fin ished Please link up now your DP slaves with periphery to your DP master 1 For the project engineering of PROFIBUS DP slaves you search the concerning PROFIBUS DP slave in the hardware catalog and drag drop it in the subnet of your master 2 Assign a valid PROFIBUS address to the DP slave 3 Link up the modules of your DP slave system in the plugged sequence a...

Page 179: ...ation CPU 2 Designate the station as DP slave 3 Add your modules according to the real hardware assembly 4 Open the properties dialog of the DP interface of the CPU by means of a double click at DP 5 Set Interface type to PROFIBUS 6 Connect to PROFIBUS and preset an address e g 3 and con firm with OK 7 Switch at Operating mode to DP slave 8 Via Configuration you define the in output address area o...

Page 180: ... you assign the according input address area on the master CPU to the slave output data and the output address area to the slave input data 11 Save compile and transfer your project to your CPU DP master and DP slave are in different projects 1 Create a new project add a station and configure a CPU 2 Designate the station as DP master 3 Add your modules according to the real hardware assembly 4 Op...

Page 181: ...e slaves adjust themselves automatically on the transfer rate n As transfer medium PROFIBUS uses an isolated twisted pair cable based upon the RS485 interface n The RS485 interface is working with voltage differences Though it is less irritable from influences than a voltage or a current inter face You are able to configure the network as well linear as in a tree structure n Max 32 participants pe...

Page 182: ...el For that purpose the bus cable must be feed through Via the order number 972 0DP10 you may order the bus connector EasyConn This is a bus con nector with switchable terminating resistor and integrated bus diag nostic Dimensions in mm 0 45 90 A 64 61 66 B 34 53 40 C 15 8 15 8 15 8 EasyConn bus con nector VIPA System 300S Deployment PROFIBUS communication PROFIBUS installation guidelines HB140 CP...

Page 183: ...ed to activate a terminating resistor 1 1 last bus participant 2 further participants CAUTION The terminating resistor is only effective if the connector is installed at a bus participant and the bus participant is con nected to a power supply The tightening torque of the screws to fix the connector to a device must not exceed 0 02Nm A complete description of installation and deployment of the ter...

Page 184: ... and DP slave project If the master has received valid configuration data he switches to Data Exchange with the DP slaves This is indicated by the DE LED After PowerON respectively a receipt of a new hardware configuration the configuration data and bus parameter were transferred to the DP master Dependent on the CPU state the following behavior is shown by the DP master Master behavior at CPU STO...

Page 185: ...on n Every connected DP slave is cyclically attended with an output telegram containing recent output data n The input data of the DP slaves were cyclically transferred to the input area of the CPU VIPA System 300S Deployment PROFIBUS communication Commissioning and Start up behavior HB140 CPU SC 313 6CF13 GB 15 50 185 ...

Page 186: ...ding is part of this manual n Windows XP SP3 n Windows Vista n Windows 7 32 and 64 bit n Windows 8 32 and 64 bit You may receive a demo version from VIPA Without any activation with the demo version the CPUs 11x of the System 100V from VIPA may be configured To configure the SPEED7 CPUs a license for the profi version is necessary This may be online be received from VIPA and activated There are th...

Page 187: ...l in the following fields n Email Addr n Your Name n Serial number The serial number may be found on a label at the CD case of WinPLC7 4 If your computer is connected to Internet you may online request the Activation Key by Get activation key via Internet Otherwise click at This PC has no access to the Internet and follow the instructions ð With successful registration the activation key is listed...

Page 188: ... module are installed and cabled n The Ethernet PG OP channel of the CPU is connected to your Ethernet network Your CPU may be connected to your PC with an Ethernet cable either directly or via hub switch n WinPCap for station search via Ethernet is installed n The power supply of the CPU and the I O periphery are activated and the CPU is in STOP state 9 3 2 Project engineering 1 Start WinPLC7 Pro...

Page 189: ... a dialog with the same name 10 Click to Accessible nodes Please regard to use this function it is necessary to install WinPCap before 11 Choose your network card and click to Determining accessible nodes ð After a waiting time every accessible station is listed Here your CPU with IP 0 0 0 0 is listed too To check this the according MAC address is also listed This MAC address may be found at a lab...

Page 190: ...s In the upper part of the editor there is the parameter table In this example the 2 integer values value1 and value2 are to be compared together Since both values are read only by the function these are to be defined as in 1 Select the in à row at the parameter table and enter at the field Name value1 Press the Return key ð The cursor jumps to the column with the data type 2 The data type may eit...

Page 191: ... field designated as empty The available operations may be added to your project by drag drop from the hardware catalog or by double click at them in the hardware cat alog 3 Open in the catalog the category Comparator and add the operation CMP I to your network 4 Click to the input left above and insert value1 Since these are block parameters a selection list of block parameters may be viewed by e...

Page 192: ...nished now Adding a new network For further comparisons the operations CMP I at Q 124 1 and CMP I at Q 124 2 are necessary Create a network for both opera tions with the following proceeding 1 Move your mouse at an arbitrary position on the editor window and press the right mouse key 2 Select at context menu è Insert new network ð A dialog field is opened to enter the position and number of the ne...

Page 193: ...wing structure The FC 1 is to be called from the cycle OB 1 1 Go to OB 1 which was automatically created with starting the project 2 Go to Project content or to Solution and open the OB 1 by a double click 3 Change to the STL view Creating the block OB 1 VIPA System 300S WinPLC7 Example project engineering Project engineering HB140 CPU SC 313 6CF13 GB 15 50 193 ...

Page 194: ...all blocks into the PLC 3 Switch the CPU to RUN by clicking at RUN in the CPU Control Center of Edit project ð The displayed state changes from STOP to RUN 4 To view the process image select View è Display process image window or click at ð The various areas are displayed 5 Double click to the process image and enter at Line 2 the address PQB 124 Confirm your input with OK A value marked by red co...

Page 195: ... CPU is graphically displayed 2 Double click to the output module open its properties dialog and enter the Module address 124 3 Switch the operating mode switch to RUN by means of the mouse ð Your program is executed and displayed in the simulator now 9 3 4 Transfer PLC program to CPU and its execution 1 For transfer to the CPU set the transfer mode to Target TCP IP Direct 2 If there are more netw...

Page 196: ...ansfer your project to your CPU with PLC è Send all blocks 8 Switch your CPU to RUN state 9 Open the OB 1 by double click 10 Change the value of one variable save the OB 1 and transfer it to the CPU ð According to your settings the process image changes immediately The status of your blocks may be displayed with Block è Monitoring On Off VIPA System 300S WinPLC7 Example project engineering Transfe...

Page 197: ...last settings used With the menu Project è Exit in the Project view you may exit the TIA Portal Here there is the possibility to save changes of your project before 10 1 2 Work environment of the TIA Portal Basically the TIA Portal has the following 2 views With the button on the left below you can switch between these views The Portal view provides a task oriented view of the tools for pro cessin...

Page 198: ...ration CPU With the Siemens TIA Portal the CPU 313 6CF13 from VIPA is to be configured as CPU 313C 2DP 6ES7 313 6CF03 0AB0 V2 6 from Siemens 1 Start the Siemens TIA Portal 2 Create a new project in the Portal view with Create new project 3 Switch to the Project view 4 Click in the Project tree at Add new device 5 Select the following CPU in the input dialog SIMATIC S7 300 CPU 313C 2DP 6ES7 313 6CF...

Page 199: ...shown in the Properties dialog Here you can make your parameter settings Ä Chapter 5 8 CPU parametrization on page 53 10 3 TIA Portal Hardware configuration I O modules After the hardware configuration of the CPU place the System 300 modules at the bus in the plugged sequence For this drag drop the according module from the Hardware catalog to the according posi tion of the profile rail in the Pro...

Page 200: ...emote control your CPU n The Ethernet PG OP channel also gives you access to the internal web page that contains information about firmware version con nected I O devices current cycle times etc n At the first commissioning respectively after a factory reset the Ethernet PG OP channel has no IP address n For online access to the CPU via the Ethernet PG OP channel valid IP address parameters have t...

Page 201: ... tree at Online access and choose here by a doubleclick your network card which is connected to the Ethernet PG OP channel 4 To get the stations and their MAC address use the Accessible device The MAC address can be found at the 1 label beneath the front flap of the CPU 5 Choose from the list the module with the known MAC address Onboard PG OP MAC address and open with Online Diag nostics the diag...

Page 202: ...6GK7 343 1EX11 0XE0 always as last module after the really plugged modules 5 Open the Property dialog by clicking on the CP 343 1EX11 and enter for the CP at Properties at Ethernet address the IP address data which you have assigned before 6 Transfer your project Device overview Module Slot Type PLC 2 CPU 3 DI 4 DI DO 5 DO DIO 6 DIO AI 7 AI AO 8 AO CP 343 1 9 CP 343 1 Take IP address param eters i...

Page 203: ...emens TIA Portal with your project 2 Select the Project view 3 Choose Libraries from the Task cards on the right side 4 Click at Global libraries 5 Click at Open global library 6 Navigate to your directory and load the file VIPA_TIA al11 7 Copy the necessary blocks from the library into the Program blocks of the Project tree of your project Now you have access to the VIPA specific blocks via your ...

Page 204: ...initialization Please consider to use the same IP address data in your project for the CP 343 1 1 For the transfer connect if not already done the appropriate Ethernet jack to your Ethernet 2 Open your project with the Siemens TIA Portal 3 Click in the Project tree at Online access and choose here by a double click your network card which is connected to the Ethernet PG OP interface 4 Select in th...

Page 205: ...rd that your user memory serves for enough space for your user program otherwise your user program is not completely loaded and the SF LED gets on When a memory card has been installed the write command stores the content of the RAM as S7PROG WLD on the memory card The write command can be found in the Siemens TIA Portal in the Task card Online tools in the command area at Memory as button Copy RA...

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Summary of Contents for SPEED7 CPU 313SCDPM

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VIPA SPEED7 CPU 313SCDPM, Manual, Page: 48 / 205

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Summary of Contents for SPEED7 CPU 313SCDPM

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