VIPA CPU 21 Series, Manual

Page: 359 / 394

Manual VIPA CPU 21x Chapter 12 Instruction list
HB103E - Rev. 05/45 12-5
Abbreviations
Abbreviation Description
/FC First check bit
2
#
Binary constant
a Byte address
ACCU Register for processing bytes, words and double words
AR Address registers, contain the area-internal or area-
crossing addresses for the instructions addressed
register-indirect
b Bit address
B area-crossing, register-indirect addressed Byte
B (b1,b2) Constant, 2Byte
B (b1,b2,b3,b4) Constant, 4Byte
B
#
16
#
Byte hexadecimal
BR Binary result
c Operand range
C Counter
C
#
Counter constant (BCD-coded)
CC0 Condition code
CC1 Condition code
D area-crossing, register-indirect addressed double word
D
#
IEC date constant
DB Data block
DBB Data byte in the data block
DBD Data double word in the data block
DBW Data word in the data block
DBX Data bit in the data block
DI Instance data block
DIB Data byte in the instance DB
DID Data double word in the instance DB
DIW Data word in the instance DB
DIX Data bit in the instance DB
DW
#
16
#
Double word hexadecimal
f Timer/Counter No.
FB Function block
FC Functions
g Operand range
h Operand range
I Input (in the PII)
i Operand range
i8 Integer (8Bit)
i16 Integer (16Bit)
i32 Integer (32 Bit)
IB Input byte (in the PII)
ID Input double word (in the PII)
IW Input word (in the PII)
k8 Constant (8 Bit)
k16 Constant (16 Bit)
k32 Constant (32 Bit)