Special Registers
EBX-41 Reference Manual
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The 32-bit cascade mode is set in TM4MODE in the Timer Control Register. There are also
internal or external clock selections for the timers in this register using the external clocks ICTC3
and ICTC4 signals on the connector at J19. The internal clock is the PCI clock divided by 8
(33.33 MHz / 8 = 4.167 MHz). ICTC3 can only be used with Timer 3. ICTC4 can only be used
with Timer 4. The clock for Timer 5 is always the internal clock except in the 32-bit cascade
mode when the output from Timer 4 is the clock for Timer 5.
The timer outputs can generate interrupts. When a timer output transitions from a 0 to a 1 then an
interrupt status bit is set and can generate an interrupt. This bit sticks until cleared.
By default there are two external timer input clocks (ICTC3, ICTC4) and two timer outputs
(OCTC3, OCTC4) on connector J19. To use all three of the 16-bit timers, timers 4 and 5 are
configured in 32-bit mode by default. Custom options are available that can expand the external
controls to allow for three clock inputs and four, timer outputs as well as three timer gate inputs
for all three 16-bit timers by using some of the digital I/O signal pins on J19.
