Interfaces and Connectors
EBX-41 Reference Manual
38
Analog Output
The Copperhead uses two 12-bit Linear Technology LTC2634 D/A converters, each with four
(4) single-ended output signals. The converter has 5 µs per-channel update rate with a 0 to
4.096V output voltage range.
The Copperhead D/A converter is controlled using the SPI registers. The D/A converter for
channels 1-4 is accessed by setting SPI slave select 7 (writing 7h to the SS field in
SPICONTROL). The D/A converter for channels 5-8 is accessed by first setting the
ADIOMODE control bit to a ‘1’ in the Miscellaneous Control Register MISCCON and then
setting SPI slave select 4 (writing 4h to the SS field in SPICONTROL). The D/A converter for
channels 1-4 can be accessed for either setting of ADIOMODE. See "SPI Registers" for a
description of the SPI interface and registers.
See the
Linear Technology LTC2634 D/A Converter Datasheet
for programming information.
Table 18: Analog Output Pinout
J19 Pin
Signal
VL-CBR-4004
Connector
VL-CBR-4004
Pin (Silkscreen)
21
Analog Output 1
J6
1 (IO17)
22
Analog Output 2
Analog Output
2 (IO18)
23
Analog Output 3
3 (IO19)
24
Analog Output 4
4 (IO20)
25
Ground
5 (GND3/PBRST#)
26
Analog Output 5
J7
1 (IO21)
27
Analog Output 6
Analog Output
2 (IO22)
28
Analog Output 7
(Custom*)
3 (IO23)
29
Analog Output 8
4 (IO24)
30
Ground
5 (GND3)
*
Contact
for information on custom
orders.
Analog Output Using the SPI Interface
The following procedure can be used to set an analog output using the SPI interface.
1.
Set ADIOMODE = 1 for the D/A converter for channels 5-8. The D/A converter for
channels 1-4 can be accessed for either setting of ADIOMODE.
2.
For the D/A converter for channels 1-4 write 27h to the SPICONTROL register (I/O
address CA8h) or write 24h for the D/A converter for channels 5-8 – This value
configures the SPI port to select the D/A converter, 24-bit frame length, low SCLK idle
state, rising edge SCLK edge, and automatic slave select.
3.
Write 30h to the SPISTATUS register (I/O address CA9h) – This value selects 8 MHz
SCLK speed, hardware IRQ disable, and left-shift data.
4.
Write the LS 4-bits of the 12-bit output value into the MS 4-bits of SPIDATA1 (I/O
address CABh). For example, if writing a 12-bit value of 123h the value of 30h is written
to SPIDATA1.
5.
Write the MS 8-bits of the 12-bit output value to SPIDATA2 (I/O address CACh). For
example, if writing a 12-bit value of 123h the value of 12h is written to SPIDATA2.
