
an interrupt, in combination wi th one or more of the 8251 interrupt sources,
you have to "open collectorize" the real time clock line.
In fact, you must
open collectorize
the real
time clock
line
if ANYboard
in
the
computer
is
wi red to generate
interrupts,
and you \vant to use the real time clock for
interrupts.
In Vector Graphic computers,
the Flashwr iter boa rd is often
wired
to generate
interrupts.)
To open collectorize the real'time clock
line, you .vill use one of the two spare open collector N~~D gates, which are
accessed
in jumper area B.
Tie a j~~per from pad A-I to pad 8-1, install a
small jLm1per from pad B-1 to B-2, and
install
a third
jumper
from B-3
to
A-8.
(This also
inverts
the clock
signal,
but this has no effect on the
syste-a.)
If you \vant to be able
to software
mask
(enable and disable) the real
time clock interrupt, then you have to do the following jumpering,
even
if
the real tiJ(\e
clock is the only interrupt:
Tie a jumper from ?in 10 of chio
U-9 to pad 8-2.
Then, install jumpers from pad A-I to B-1, and from B-3
to
A-8, as in the ?recedin3paragraph,
but do not put a j~~per becween 8-1 and
B-2.
Important:
If there is more than one Bitstreamer II board in the system,
only one of them should generate real tirneclock interrupts.
The board requires that you software rnask (enable and disable) the TxRDY
and RxRDY
interrupt
sources
that have
been
connected
in area A.
If you
wired the real time clock interrupt to be software lnaskable, then naturally
it too must
be software
masked.
To mask the interrupts, you output a byte
to Parallel Channel A, which is I/O address x8
(usually
08).
This
is the
"inter rupt masking
re9iste r. "
The cho ice of enabled
and disabled lines
remains
the same
until
the next
time you
send a byte
to the
interrupt
masking
register.
Each bit corresponds to one interrupt source, as listed
in Table
8.
A 1 enables
the corresponding
interrupt
source,
and
a 0
disables
the source.
It does
not matter
what you put in bit position 7,
'Nhich is not used.
For example, assume you have wired up all the interrupt
sources.
To enable only serial channel B ~hRDY, serial channel C RxRDY, and
the real time clock interrupt sources, output 64H to I/O address x8.
64 in
hexadecimal
notation
equals
01100100
in binary,
which
has
l's
in bit
positions 2, 5, and 6 only (reading fran the right, beginning with position
0).
Outputting 7F to I/O address x8 enables all t:'1e
interrupt sources.
Remember: if you are using any software maskable interrupts,
the output
side
of Parallel
Channel
A cannot
be used for any other purpose, because
each
time you
send
a byte
to it, you will
change
which
interrupts
are
enabled
or disabled.
You MUST initialize ~~e interrupt masking re3ister at
the start of any progra~ usin3 b~ese interrupts.
IE you
are using
an 8080 CPU, the interrupt source is required to put a
byte
of data
on the S-100
input data
bus at about
the
same
time
the
interrupt
is sent.
Specifically,
it has to be put on the bus by the time
the CPU activates t..;"'e
sn,IT.~
li;1e
L:1
resp)!1seto b'leinterrupt.
This byte of
data
has
to be a single
executable
instruction,
because
the 8080
will
execute it.
Normally, it is one of the 8080 RST
(restart)
instructions,
which cause the processor to call a program at a ·specific address determined
Summary of Contents for Bitstreamer II
Page 1: ...lit t tiCAli1iC I JI U E I mAnUAL...
Page 2: ......
Page 3: ...BITSTREAMER II BOARD Revision 1 USER S MANUAL Revision A January 1 1980...
Page 6: ......
Page 8: ......
Page 18: ......
Page 19: ......
Page 24: ......
Page 46: ......
Page 50: ......
Page 52: ......
Page 53: ......
Page 54: ......