Vector Graphic Bitstreamer II, User Manual, Page: 15 / 54

Interrupts can be generated from each of the three 8251 RxRDY pins, and
each of the three 8251 TxRDY pins. You can choose to generate interrupts
from one or any combination of these six signals. Jumper pads are provided
for wiring up the interrupt capability for each of these signals, as
described in Section 2.7.
The board requires that you specify in software which of the signals so
wired are to actually generate interrupts. This enables you to wire up
several of them, and then to dynamically control which ones generate
interrupts at any given time. This procedure is called "interrupt masking"
and uses an I/O address known as the "interrupt masking register.
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For example, assume you are creating a software routine that outputs a
character to an 8251 whenever that 8251 is ready to transmit it, but you do
not want to poll the 8251 to determine when it is ready. Assume instead
that you want to arrange for the 8251 to interrupt some other routine
whenever the 8251 is ready to transmit. To do this, you would connect the
TxRDY pin of that 8251 to the interrupt line, as described in Section 2.7.
Now, as soon as you receive an interrupt, your software will branch to an
interrupt service routine which transmits a character. When it is finished
transmitting a character, you do not want to re-enable interrupts until you
are ready to transmit the next character, because otherwise, the 8251 will
tie up the CPU with TxRDY interrupts. The problem is that you do not want
to leave interrupts disabled because you want other peripherals such as the
keyboard to be able to interrupt. The way you solve this is to enable
interrupts, but also mask out the TxRDY interrupt using the interrupt
masking register until software is ready to transmit another character.
You must use the interrupt masking register whenever you are using the
8251's to generate interrupts. Even if you do not want to disable some of
the interrupt sources, you must enable them at the outset by initializing
the interrupt masking register appropriately.
The interrupt masking register is the output side of Parallel Channel A
on the Bitstreamer II Board. The parallel channels are discussed later in
Perspective. The precise way that the interrupt masking register is used
by software is discussed in Section 2.7. If you are using the 8251's as
interrupt sources, you cannot use the output side of Parallel Channel A for
any other purpose.