Checkpoint Description
33 Initializes the silent boot module. Set the window for displaying text information.
37 Displaying sign-on message, CPU information, setup key message, and any OEM
specific information.
38 Initializes different devices through DIM. See DIM Code Checkpoints section
of document for more information.
39 Initializes DMAC-1 & DMAC-2.
3A Initialize RTC date/time.
3B Test for total memory installed in the system. Also, Check for DEL or ESC keys to limit
memory test. Display total memory in the system.
3C Mid POST initialization of chipset registers.
40 Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, ... etc.)
successfully installed in the system and update the BDA, EBDA ... etc.
50 Programming the memory hole or any kind of implementation that needs an adjustment
in system RAM size if needed.
52 Updates CMOS memory size from memory found in memory test.
Allocates memory for Extended BIOS Data Area from base memory.
60 Initializes NUM-LOCK status and programs the KBD type matic rate.
75 Initialize Int-13 and prepare for IPL detection.
78 Initializes IPL devices controlled by BIOS and option ROMs.
7A Initializes remaining option ROMs.
7C Generate and write contents of ESCD in NVRam.
84 Log errors encountered during POST.
85 Display errors to the user and gets the user response for error.
87 Execute BIOS setup if needed / requested.
8C Late POST initialization of chipset registers.
8D Build ACPI tables (if ACPI is supported)
8E Program the peripheral parameters. Enable/Disable NMI as selected
90 Late POST initialize of system management interrupt.
A0 Check boot password if installed.
A1 Clean-up work needed before booting to OS.
A2 Takes care of runtime image preparation for different BIOS modules. Fill the free area
in F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares
the runtime language module. Disables the system configuration display if needed.
A4 Initialize runtime language module.
A7 Displays the system configuration screen if enabled.
Initialize the CPU's before boot, which includes the programming of the MTRR's.
A8 Prepare CPU for OS boot including final MTRR values.
96
Summary of Contents for XtremeServer 1322
Page 1: ...Rev 1 5 1322 ...
Page 4: ...Part I User s Guide ...
Page 25: ... Lower the locking lever and latching it into the fully locked position 23 ...
Page 44: ...4 1 5 9 AMD PowerNow Configuration Submenu 4 1 5 10 Remote Access Configuration Submenu 42 ...
Page 46: ...4 1 5 12 Onboard Device Configuration Submenu 44 ...
Page 47: ...4 1 6 PCI PnP Menu PCI PnP Menu 1 PCI PnP Menu 2 45 ...
Page 51: ...Security Menu 3 Clear User Password Security Menu 4 Boot Sector Virus Protection 49 ...
Page 53: ...4 1 9 1 NorthBridge Chipset Configuration Submenu 4 1 9 Chipset Configuration Menu 51 ...
Page 85: ...XtremeServer ServerDome Agent Xtreme 83 ...
Page 86: ...Part Il Technical Guide ...