SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R08
Objective Specification
System description
Page 35 of 188
1.6.2.2
Switch-off sequence by AT+CPWROFF
Figure 20 describes the SARA-G3 and SARA-U2 series modules power-off sequence, properly started sending the
AT+CPWROFF command, allowing storage of current parameter settings in the module’s non-volatile memory
and a proper network detach, with the following phases:
When the +CPWROFF AT command is sent, the module starts the switch-off routine.
The module replies OK on the AT interface: the switch-off routine is in progress.
At the end of the switch-off routine, all the digital pins are tri-stated and all the internal voltage regulators
are turned off, including the generic digital interfaces supply (
V_INT
), except the RTC supply (
V_BCKP
).
Then, the module remains in power-off mode as long as a switch on event does not occur (e.g. applying a
proper low level to the
PWR_ON
input, or applying a proper low level to the
RESET_N
input), and enters
not-powered mode if the supply is removed from the
VCC
pins.
VCC
V_BCKP
PWR_ON
SARA-U2 RESET_N
V_INT
SARA-G3 RESET_N
Internal Reset
System State
Digital Pins State
Operational
OFF
Tristate / Floating
ON
Operational
→
Tristate
AT+CPWROFF
sent to the module
0 s
~2.5 s
~5 s
OK
replied by the module
VCC
can be removed
Figure 20: SARA-G3 and SARA-U2 series power-off sequence description
The Internal Reset signal is not available on a module pin, but the application can monitor the
V_INT
pin
to sense the end of the SARA-G3 and SARA-U2 series power-off sequence.
The duration of each phase in the SARA-G3 and SARA-U2 series modules’ switch-off routines can largely
vary depending on the application / network settings and the concurrent module activities.
