SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R08
Objective Specification
Design-in
Page 117 of 188
If a 3.0 V Application Processor is used, appropriate unidirectional voltage translators must be provided using the
module
V_INT
output as 1.8 V supply, as described in Figure 63.
4
V_INT
TxD
Application Processor
(3.0V DTE)
RxD
RTS
CTS
DTR
DSR
RI
DCD
GND
SARA-G3 / SARA-U2
(1.8V DCE)
12
TXD
9
DTR
13
RXD
10
RTS
11
CTS
6
DSR
7
RI
8
DCD
GND
1V8
B1
A1
GND
U1
B3
A3
VCCB
VCCA
Unidirectional
Voltage Translator
C1
C2
3V0
DIR3
DIR2
OE
DIR1
VCC
B2
A2
B4
A4
DIR4
TP
0
Ω
TP
0
Ω
TP
0
Ω
TP
0
Ω
TP
Figure 63: UART interface application circuit with partial V.24 link (5-wire) in DTE/DCE serial communication (3.0 V DTE)
Reference
Description
Part Number - Manufacturer
C1, C2
100 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R61A104KA01 - Murata
U1
Unidirectional Voltage Translator
SN74AVC4T774 - Texas Instruments
Table 33: Component for UART application circuit with partial V.24 link (5-wire) in DTE/DCE serial communication (3.0 V DTE)
If only
TXD
,
RXD
,
RTS
and
CTS
lines are provided, as implemented in Figure 62 and in Figure 63, and if HW
flow-control is enabled (AT&K3, default setting), the power saving can be activated in this way:
AT+UPSV=1: the module automatically enters the low power idle-mode whenever possible and the UART
interface is periodically enabled, as described in section 1.9.1.4, reaching low current consumption.
With this configuration, when the module is in idle-mode, data transmitted by the DTE will be buffered by
the DTE and will be correctly received by the module when active-mode is entered.
If the HW flow-control is disabled (AT&K0), it is recommended to enable the power saving in this way:
AT+UPSV=2: the module automatically enters the low power idle-mode whenever possible and the UART
interface is enabled by the
RTS
line, as described in section 1.9.1.4, reaching very low current consumption.
With this configuration, when the module is in idle-mode, the UART is re-enabled 20 ms after
RTS
has been
set ON, and the recognition of subsequent characters is guaranteed until the module is in active-mode
Providing the TXD and RXD lines only (not using the complete V24 link)
If the functionality of the
CTS
,
RTS
,
DSR
,
DCD
,
RI
and
DTR
lines is not required in the application, or the lines
are not available:
Connect the module
RTS
input line to GND or to the
CTS
output line of the module: since the module
requires
RTS
active (low electrical level) if HW flow-control is enabled (AT&K3, that is the default setting),
the pin can be connected using a 0
series resistor to GND or to the active-module
CTS
(low electrical level)
when the module is in active-mode, the UART interface is enabled and the HW flow-control is enabled
Connect the module
DTR
input line to GND, since the module requires
DTR
active (low electrical level)
Leave
DSR
,
DCD
and
RI
lines of the module unconnected and floating
If RS-232 compatible signal levels are needed, the Maxim 13234E voltage level translator can be used. This chip
translates voltage levels from 1.8 V (module side) to the RS-232 standard.
