Ublox LISA-U2 Series System Integration Manual Download Page 170

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LISA-U2 series - System integration manual

UBX-13001118 - R27

Appendix

Page 170 of 183

C1-Public

A.3.2

Pin-out comparison LISA-U1 series vs. LISA-U2 series

65
64
63
62

60
59
58
57
56
55
54
53
52

50
49
48
47
46
45
44
43
42

GND

VCC
VCC
VCC

GND

SPI_MRDY

SPI_SRDY

SPI_MISO
SPI_MOSI
SPI_SCLK

RSVD / SPK_N

GND

RSVD / SPK_P

RSVD

GPIO5

VSIM

SIM_RST

SIM_IO

SIM_CLK

SDA

SCL

RSVD / I2S_RXD

RSVD / I2S_CLK

RSVD / I2S_TXD

RSVD / I2S_WA

2
3
4
5
6
7
8
9

12
13
14
15
16
17
18
19

22
23
24
25

V_BCKP
GND
V_INT
RSVD
GND
GND
GND
DSR
RI
DCD
DTR

GND

RTS
CTS
TXD
RXD
GND
VUSB_DET
PWR_ON
GPIO1
GPIO2
RESET_N
GPIO3
GPIO4
GND

26
27

USB_D-
USB_D+

40
39

RSVD / MIC_P

RSVD / MIC_N

GND

LISA-U1

Top View

Pin 28…38 = GND

RSVD

Analog

Audio

SPI

RSVD

Figure 77: LISA-U1 series pin assignment

65
64
63
62

59
58
57
56
55
54
53
52

50
49
48
47
46
45
44
43
42

GND

VCC
VCC
VCC

GND

SPI_MRDY / GPIO14

SPI_SRDY / GPIO13

SPI_MISO / GPIO12

SPI_MOSI / GPIO11

SPI_SCLK / GPIO10

GPIO9 / I2S1_WA

GND

GPIO8 / I2S1_CLK

RSVD / CODEC_CLK

GPIO5

VSIM

SIM_RST

SIM_IO

SIM_CLK

SDA

SCL

RSVD / I2S_RXD

RSVD / I2S_CLK
RSVD / I2S_TXD

RSVD / I2S_WA

2
3
4
5
6
7
8
9

12
13
14
15
16
17
18
19

22
23
24
25

V_BCKP
GND
V_INT
RSVD
GND
GND
GND
DSR
RI
DCD
DTR

GND

RTS
CTS
TXD
RXD
GND
VUSB_DET
PWR_ON
GPIO1
GPIO2
RESET_N
GPIO3
GPIO4
GND

26
27

USB_D-
USB_D+

40
39

GPIO7 / I2S1_TXD

GPIO6 / I2S1_RXD

GND

LISA-U2

Top View

Pin 28…38 = GND

Clock

Out

Digital

Audio

GPIO

Rx Div

SPI

GPIO

Figure 78: LISA-U2 series pin assignment
(highlighted name/function changes)

LISA-U1 series

LISA-U2 series

Name

Description

Name

Description

Remarks for Migration

GND

Ground

GND

Ground

V_BCKP

RTC supply
input/output

V_BCKP

RTC supply
input/output

V_BCKP operating characteristics difference:
LISA-U1 series:

V_BCKP output = 2.3 V typ.
V_BCKP input = 1.0 V min / 2.5 V max

LISA-U2 series:

V_BCKP output = 1.8 V typ.
V_BCKP input = 1.0 V min / 1.9 V max

GND

Ground

GND

Ground

V_INT

Digital Interfaces
supply output

V_INT

Digital Interfaces
supply output

No difference:
V_INT output = 1.8 V typ., 70 mA max.

RSVD

RESERVED pin

RSVD

RESERVED pin

No difference:
This pin must be connected to GND

6…8

GND

Ground

GND

Ground

DSR

UART data set ready
output

DSR

UART data set ready
output

Circuit 107 (DSR) in ITU-T V.24, 1.8 V typ.
LISA-U1 series:

Output driver strength = 4 mA

LISA-U2 series:

Output driver strength = 1 mA

Summary of Contents for LISA-U2 Series

Page 1: ...manual Abstract This document describes the features and the system integration of LISA U2 series HSPA cellular modules These modules are complete and cost efficient 3 75G solutions offering up to six...

Page 2: ...SA U200 04B 00 23 41 A01 11 UBX 19026176 Initial production LISA U200 52S 01 22 86 A01 01 UBX 14005768 Obsolete LISA U200 52S 02 22 86 A01 03 UBX 17048820 Obsolete LISA U200 52S 03 22 86 A01 04 UBX 18...

Page 3: ...of life LISA U270 63S 00 22 93 A01 06 UBX 16010383 Obsolete LISA U270 63S 01 22 93 A01 07 UBX 17048820 End of life LISA U270 63S 02 22 93 A01 08 UBX 18055867 Mass production LISA U270 68S 00 22 93 A0...

Page 4: ...circuits 47 1 9 Serial communication 53 1 9 1 Serial interfaces configuration 54 1 9 2 Asynchronous serial interface UART 55 1 9 3 USB interface 74 1 9 4 SPI interface 79 1 9 5 MUX protocol 3GPP TS 2...

Page 5: ...ntenna detection functionality 138 2 5 ESD guidelines 139 2 5 1 ESD immunity test overview 139 2 5 2 ESD immunity test of u blox LISA U2 series reference designs 140 2 5 3 ESD application circuits 141...

Page 6: ...2 6 Wave soldering 161 4 2 7 Hand soldering 161 4 2 8 Rework 162 4 2 9 Conformal coating 162 4 2 10 Casting 162 4 2 11 Grounding metal covers 162 4 2 12 Use of ultrasonic processes 162 5 Product testi...

Page 7: ...Class E2 26 dBm for DCS PCS bands PS Packet Switched Data Rate HSUPA category 6 up to 5 76 Mbit s UL HSDPA category 8 up to 7 2 Mbit s DL for LISA U200 LISA U201 LISA U260 and LISA U270 HSDPA category...

Page 8: ...er GPRS EGPRS traffic and channel encoding from Coding Scheme 1 up to Modulation and Coding Scheme 9 performing link adaptation to achieve the highest possible data rate Table 2 summarizes the interfa...

Page 9: ...main antenna switch which dispatches the RF signals according to the active mode For time duplex 2G operation the incoming signal at the active receiver RX slot is applied by the main antenna switch...

Page 10: ...d SAW filter bank for out of band rejection and then to the diversity receiver port of the RF transceiver In all the modes a fractional N sigma delta RF synthesizer and an on chip 3 296 4 340 GHz volt...

Page 11: ...ction can improve RF performance all GND pins must be externally connected to ground V_BCKP All 2 I O Real Time Clock supply input output V_BCKP 1 8 V typical generated by the module when VCC supply v...

Page 12: ...line Fixed open drain External pull up required See section 1 10 UART RxD All 16 O UART data output Circuit 104 RxD in ITU T V 24 Provide access to the pin for FW update and debugging if the USB inte...

Page 13: ...ication processor See section 1 9 3 USB_D All 26 I O USB Data Line D 90 nominal differential impedance Z0 30 nominal common mode impedance ZCM Pull up or pull down resistors and external series resist...

Page 14: ...n 1 11 I2S1_CLK All 53 I O Second I2S clock Check device specifications to ensure compatibility with module supported modes See section 1 11 I2S1_RXD All 39 I Second I2S receive data Internal active p...

Page 15: ...alarm see 1 6 1 module switches from power off to active mode When VCC supply is removed the module switches from power off mode to not powered mode Idle Application interfaces are disabled the module...

Page 16: ...prepared to accept data from an external device unless power saving configuration is enabled by AT UPSV see 1 9 2 3 1 9 3 2 1 9 4 2 and the u blox AT commands manual 2 When a voice call or a data cal...

Page 17: ...a power efficient circuit topology Figure 3 and by power management software that controls the module s power saving mode Baseband Processor 2G 3G Power Amplifier s Switching Step Down 5 x 1 0 F 61 V...

Page 18: ...m start up and system reset control 1 5 2 Module supply VCC The LISA U2 series modules must be supplied through the VCC pins by a DC power supply Voltages must be stable during operation the current d...

Page 19: ...ed exposure beyond it may affect device reliability Stress beyond the VCC absolute maximum ratings can cause permanent damage to the module if necessary voltage spikes beyond the VCC absolute maximum...

Page 20: ...voltage much higher e g greater than 5 V than the LISA U2 series module s operating supply voltage The use of switching step down provides the best power efficiency for the overall application and mi...

Page 21: ...e of providing a voltage value to the VCC pins within the specified operating range and must be capable of delivering 2 5 A current pulses with 1 8 duty cycle to the VCC pins Low output ripple the swi...

Page 22: ...on Part Number Manufacturer C1 10 F Capacitor Ceramic X7R 5750 15 50 V C5750X7R1H106MB TDK C2 10 nF Capacitor Ceramic X7R 0402 10 16 V GRM155R71C103KA01 Murata C3 680 pF Capacitor Ceramic X7R 0402 10...

Page 23: ...100 F Capacitor Tantalum B_SIZE 20 6 3V 15m T520B107M006ATE015 Kemet C3 5 6 nF Capacitor Ceramic X7R 0402 10 50 V GRM155R71H562KA88 Murata C4 6 8 nF Capacitor Ceramic X7R 0402 10 50 V GRM155R71H682KA...

Page 24: ...with appropriate power handling capability The use of a linear regulator is suggested when the difference from the available supply rail and the VCC value is low linear regulators provide high efficie...

Page 25: ...C pins The maximum pulse and the maximum DC discharge current is not always reported in battery data sheets but the maximum DC discharge current is typically almost equal to the battery capacity in Am...

Page 26: ...e VCC bypass capacitors as described in Figure 9 and Table 10 if the application device integrates an internal antenna C1 GND C2 C4 LISA U2 series 62 VCC 63 VCC 61 VCC 3V8 C5 LISA U series C5 GND plan...

Page 27: ...sed it can operate in quasi pulse mode reducing power dissipation GND LISA U2 series 62 VCC 63 VCC 61 VCC C8 C7 C6 C5 USB Supply C3 R4 U1 IUSB IAC IEND TPRG SD VIN VINSNS MODE ISEL C2 C1 5V0 TH GND VO...

Page 28: ...antenna for 576 9 s width of the transmit slot burst with a periodicity of 4 615 ms width of 1 frame 8 slots burst so with a 1 8 duty cycle according to GSM TDMA Time Division Multiple Access If the...

Page 29: ...width of 1 frame 8 slots bursts so with a 1 2 duty cycle according to GSM TDMA If the module is in GPRS connected mode in the DCS 1800 or in the PCS 1900 band the current consumption figures are lower...

Page 30: ...the current drawn by the module at the VCC pins is in the order of continuous 500 800 mA see LISA U2 series data sheet 1 for detailed values Even at lowest output RF power approximately 0 01 W or 50 d...

Page 31: ...ceptions is defined by the network 2G or 3G This is the paging period parameter fixed by the base station through broadcast channel sent to all users on the same serving cell For a 2G network the time...

Page 32: ...ference clock frequency is used An example of the current consumption profile of the data module when power saving is disabled is shown in Figure 15 the module is registered with the network active mo...

Page 33: ...normally used to set the wake up interval during idle mode periods between network paging but is able to provide programmable alarm functions by means of the internal 32 768 kHz clock The RTC can be...

Page 34: ...be placed at V_BCKP to provide a long buffering time This capacitor will hold V_BCKP voltage within its valid range for around 50 s at 25 C after the VCC supply is removed If a very long buffering tim...

Page 35: ...able battery Combining a LISA U2 series cellular module with a u blox GNSS receiver the VCC supply of the GNSS receiver is controlled by the cellular module by means of the GNSS supply enable function...

Page 36: ...ired if the line is externally accessible on the application board Higher protection levels can be achieved by mounting an ESD protection e g EPCOS CA05P4S14THSG varistor array on the line connected t...

Page 37: ...PWR_ON pin has high input impedance Do not keep floating in noisy environment external pull up required Table 16 Power on pin The PWR_ON pin ESD sensitivity rating is 1 kV Human Body Model according t...

Page 38: ...xternal device e g application processor use an open drain output on the external device with an external pull up resistor e g 100 k biased by V_BCKP supply pin of the module A push pull output of an...

Page 39: ...directly connected without any external pull up A push pull output can be used too in this case make sure that the high level voltage of the push pull circuit is below the maximum voltage operating r...

Page 40: ...ation phase differs within generic digital interfaces 3 to 6 s typical and USB interface due to specific enumeration timings 5 to 8 s typical see section 1 9 3 1 The host application processor should...

Page 41: ...es when the VCC supply is removed but in this case the current parameter settings are not saved in the module s non volatile memory and a proper network detach cannot be performed It is highly recomme...

Page 42: ...phase in the LISA U2 series modules switch off routines can largely vary from the values reported in Figure 19 e g from tens of milliseconds up to tens of seconds depending on the application network...

Page 43: ...ger than the one defined in the u blox AT commands manual 2 When a low level is applied to the RESET_N input it causes an external or hardware reset of the module with an asynchronous abrupt reset of...

Page 44: ...ation board for more details see section 2 5 3 LISA U2 series 2 V_BCKP 22 RESET_N Reset push button ESD Open Drain Output Application processor LISA U2 series 2 V_BCKP 22 RESET_N Rint Rint EMI1 C1 EMI...

Page 45: ...D immunity rating of the ANT port is 1000 V according to IEC 61000 4 2 Higher protection level could be required if the line is externally accessible on the application board for further details see s...

Page 46: ...the lines are connected to an SIM card connector since they are externally accessible on the application board For more details about ESD immunity precautions for SIM interface pins see section 2 5 3...

Page 47: ...where SIM changing is required during the product lifetime A SIM card holder can have 6 or 8 positions if a mechanical card presence detector is not provided or it can have 6 2 or 8 2 positions if tw...

Page 48: ...ss than 10 pF ESD protection e g Tyco Electronics PESD0402 140 on each externally accessible SIM line close to each specific pad of the SIM connector the ESD sensitivity rating of the SIM interface pi...

Page 49: ...CLK line 1 0 s is the maximum allowed rise time on the SIM_IO and SIM_RST lines LISA U2 series 50 VSIM 48 SIM_IO 47 SIM_CLK 49 SIM_RST 4 V_INT 51 GPIO5 SIM CHIP SIM Chip Bottom View contacts side C1 V...

Page 50: ...de a very low capacitance i e less than 10 pF ESD protection e g Tyco Electronics PESD0402 140 on each externally accessible SIM line close to each specific pad of the SIM connector ESD sensitivity ra...

Page 51: ...tch between more than two SIMs a circuit similar to the one described in Figure 24 can be implemented for example in case of four SIM circuits using a suitable 4 pole 4 throw switch or alternatively f...

Page 52: ...IO C7 CLK C3 RST C2 GND C5 J2 C6 C7 C8 C1 0 C9 D5 D6 D7 D8 Application Processor GPIO R1 Figure 24 Application circuit for connection to two removable SIM cards with SIM detection implemented Referenc...

Page 53: ...AT commands according to 3GPP TS 27 007 4 AT commands according to 3GPP TS 27 005 5 AT commands according to 3GPP TS 27 010 6 u blox AT commands For the complete list of supported AT commands and thei...

Page 54: ...B interface Enabled 6 CDCs are available configured as described in the following list USB1 AT commands data connection USB2 AT commands data connection USB3 AT commands data connection USB4 GPS tunne...

Page 55: ...the ITU T V 24 Recommendation 3 UART interfaces include the following lines Name Description Remarks DSR Data set ready Module output Circuit 107 Data set ready in ITU T V 24 RI Ring Indicator Module...

Page 56: ...rom the DTE at any rate can be AT CPIN 1234 Characters different than AT are ignored during the baud rate detection since the at or AT sequence triggers the hardware detection sequence At or aT sequen...

Page 57: ...me format which is the default configuration with a fixed baud rate is described in the Figure 25 D0 D1 D2 D3 D4 D5 D6 D7 S tart of 1 Byte trans fer S tart Bit Always0 P os s ible S tart of next trans...

Page 58: ...red by AT commands for more details see the u blox AT commands manual 2 AT K AT Q AT IFC AT UCTS AT command If the hardware flow control is not enabled the CTS line after the UART initialization behav...

Page 59: ...is not activated by the DTE an active pull up is enabled inside the module on the DTR input Module behavior according to DTR status depends on the AT command configuration see the u blox AT commands...

Page 60: ...ine is kept to ON state even during the online command mode to indicate that the data call is still established even if suspended while if the module enters command mode the DSR line is set to OFF sta...

Page 61: ...commands manual 2 AT URING command the RI line is asserted when one of the configured events occur and it remains asserted for 1 second unless another configured event will happen with the same behavi...

Page 62: ...he module and will be correctly received by the DTE when it is ready to receive data i e RTS line will be ON 1 Disabled AT K0 ON or OFF ON or OFF The first character sent by the DTE is lost but after...

Page 63: ...any required activity related to the network or any other required activity related to the functions interfaces of the module The UART is enabled and the module does not enter low power idle mode in...

Page 64: ...T interface is disabled and the module may enter idle mode immediately after the AT UPSV 1 has been sent The hardware flow control output CTS line indicates when the UART interface is enabled data can...

Page 65: ...ontrol is enabled with AT UPSV 3 The AT UPSV 3 power saving configuration is not supported by the 01 product version Wake up via data reception The UART wake up via data reception consists of a specia...

Page 66: ...s Recognized by DCE OFF ON TXD input UART OFF ON Figure 30 Wake up via data reception with further communication Figure 30 shows the case where in addition to the wake up character further valid chara...

Page 67: ...tions The LISA U2 series modules are forced to stay in active mode if the USB is connected and not suspended and therefore the AT UPSV 1 AT UPSV 2 or AT UPSV 3 settings are overruled but they still ha...

Page 68: ...RI 1 1 DCD GND 0 0 TP TP 0 0 TP TP Figure 31 UART interface application circuit with complete V 24 link in DTE DCE serial communication 1 8V DTE If a 3 0 V Application Processor is used appropriate un...

Page 69: ...ce application circuit with partial V 24 link 6 wire in the DTE DCE serial communication 1 8 V DTE If a 3 0 V application processor is used appropriate unidirectional voltage translators must be provi...

Page 70: ...terface is enabled by the RTS line as described in section 1 9 2 3 reaching very low current consumption With this configuration when the module is in idle mode the UART is re enabled 20 ms after RTS...

Page 71: ...ly enabled as described in section 1 9 2 3 reaching low current consumption With this configuration when the module is in idle mode data transmitted by the DTE will be buffered by the DTE and will be...

Page 72: ...ial V 24 link 3 wire in DTE DCE serial communication 3 0 V DTE Reference Description Part Number Manufacturer C1 C2 100 nF Capacitor Ceramic X7R 0402 10 16 V GRM155R61A104KA01 Murata U1 Unidirectional...

Page 73: ...resistance value for the external pull up biased by the application processor supply rail If the module USB interface is connected to the application processor it is highly recommended to provide dir...

Page 74: ...levels could be required if the lines are externally accessible on the application board Higher protection levels can be achieved by mounting a very low capacitance i e less or equal to 1 pF ESD prot...

Page 75: ...LISA U2 module default USB profile VID 0x1546 PID 0x1102 The default configuration of the USB interface provides 7 USB CDC ACM modem COM ports USB1 AT and data USB2 AT and data USB3 AT and data USB4 G...

Page 76: ...nsfer Interrupt Interface 9 Data EndPoint Transfer Bulk EndPoint Transfer Bulk Function Primary Log Interface 10 Abstract Control Model EndPoint Transfer Interrupt Interface 11 Data EndPoint Transfer...

Page 77: ...ower saving configuration is enabled by the AT UPSV command the module automatically enters the low power idle mode whenever possible but it wakes up to active mode according to any required activity...

Page 78: ...gnal integrity may be degraded if the PCB layout is not optimal especially when the USB signaling lines are very long The common mode characteristic impedance ZCM of each USB data line should be as cl...

Page 79: ...update application note 16 Name Description Remarks SPI_MISO SPI Data Line Host input local device output Module Output Idle high Shift data on rising clock edge CPHA 1 Latch data on falling clock edg...

Page 80: ...nsmit or receive IPC host ready signal and can also be used by the application processor to wake up the module baseband processor if it is in idle mode SPI_SRDY line is used by the module baseband pro...

Page 81: ...42 Data transfer initiated by the LISA U2 module local device with a sleeping application processor host When the host is sleeping idle mode the following actions happen 1 The local device indicates t...

Page 82: ...er terminated and then restarted by LISA U2 module local device Starting from the state where data transfer is ongoing the following actions will happen 1 In case of the last transfer the host will lo...

Page 83: ...application processor that runs as an SPI host able to detect an external interrupt which comes from the module Signal integrity of the high speed data lines may be degraded if the PCB layout is not...

Page 84: ...3 0 V SPI host If the SPI IPC interface is not used the SPI_MOSI SPI_MISO SPI_SCLK SPI_MRDY SPI_SRDY pins can be left unconnected Any external signal connected to the SPI IPC interface must be tri sta...

Page 85: ...hannel 1 5 AT commands data connection Channel 6 GNSS tunneling Channel 7 SAP SIM Access Profile For more details see the Mux implementation application note 14 If the module switch off AT command CPW...

Page 86: ...ull control of the GNSS receiver from any host processor LISA U2 modules feature embedded GPS aiding that is a set of specific features developed by u blox to enhance GNSS performance decreasing Time...

Page 87: ...resistors and the bus capacitance Long wires on the bus will increase the capacitance If the bus capacitance is increased use pull up resistors with a nominal resistance value less than 4 7 k to match...

Page 88: ...the cellular module When power saving is enabled in the cellular module by the AT UPSV command and the GNSS receiver does not send data by the DDC I2C interface the module automatically enters idle mo...

Page 89: ...e GNSS receiver to provide the supply for the GNSS real time clock and backup RAM when the VCC supply of the cellular module is within its operating range and the VCC supply of the GNSS receiver is di...

Page 90: ...cteristic of the V_INT supply output The power saving configuration cannot be enabled to use V_INT output to properly supply any 1 8 V GNSS receiver of the u blox 6 generation and any 1 8 V GNSS recei...

Page 91: ...lar supply The V_BCKP supply output of the cellular module can be directly connected to the V_BCKP backup supply input pin of the GNSS receiver as in the application circuit for a u blox 1 8 V GNSS re...

Page 92: ...the word alignment and clock signals of the I2S digital audio interface are generated by the module In local device mode these signals must be generated by the remote device Table 40 lists the signals...

Page 93: ...to select o the first I2S interface using I2S_RXD module input o the second I2S interface using I2S1_RXD module input main_downlink must be properly set to select o the first I2S interface using I2S_T...

Page 94: ...ta changes on the I2S clock falling edge 1 11 2 I2S interface Normal I2S mode Normal I2S supports 16 bit words Mono interface Configurable sample rate 8 11 025 12 16 22 05 24 32 44 1 48 kHz Main featu...

Page 95: ...x I2S_sample_rate in Normal I2S mode long alignment mode Compatible voltage levels 1 80 V typ otherwise it is recommended to connect the 1 8 V digital audio interface of the module to the external 3 0...

Page 96: ...ce of the cellular module The CODEC_CLK digital output clock of the cellular module is connected to the clock input of the external audio codec to provide the clock reference Signal integrity of the h...

Page 97: ...uppression Filter 1800 Ohm at 100 MHz 2700 Ohm at 1 GHz BLM15HD182SN1 Murata J1 Microphone Connector Various manufacturers J2 Speaker Connector Various manufacturers MIC 2 2 k Electret Microphone Vari...

Page 98: ...r and sample rate converters for 8 16 to 47 6 kHz conversion The voiceband audio processing implemented in the DSP core of LISA U2 series modules is summarized in Figure 51 I2S_RXD Switch I2S1_RXD UBF...

Page 99: ...GPIOC UGPIOR UGPIOW UGPS UGPRF USPM The following functions are available in the LISA U2 modules GSM Tx burst indication GPIO1 pin can be configured by AT UGPIOC to indicate when a GSM Tx burst slot o...

Page 100: ...RTC sharing function will be set as Output to provide an RTC Real Time Clock synchronization signal to the u blox GNSS receiver if the parameter mode of AT UGPS command is set to 1 and parameter GPS_...

Page 101: ...us indication function is set as Continuous Output Low if no service no network coverage or not registered Cyclic Output High for 100 ms Output Low for 2 s if registered home 2G network Cyclic Output...

Page 102: ...PI_MOSI SPI_MISO SPI_SRDY and SPI_MRDY respectively Only these pins can be configured as the SPI IPC serial interface correctly setting the parameter gpio_mode of AT UGPIOC command to 13 default setti...

Page 103: ...Supply Enable GSM Tx Burst Indication Module Status Indication 21 GPIO2 GPIO By default the pin is configured to provide GNSS Supply Enable function Can be alternatively configured by the UGPIOC comm...

Page 104: ...as Output Input Pad disabled 56 SPI_MOSI GPIO11 SPI Data Line GPIO By default the pin is configured as SPI Data Line Input Shift data on rising clock edge CPHA 1 Latch data on falling clock edge CPHA...

Page 105: ...en the module is in power down mode when the external reset is forced low and during the module power on sequence at least for 3 seconds after the start up event to avoid latch up of circuits and allo...

Page 106: ...hen the module is switched off is inverted by a transistor biased by the V_BCKP supply which is generated by the module when a valid VCC is applied A pull down resistor is provided at the GPIO1 output...

Page 107: ...1 8V DTE 1 8V SPI Master USB 2 0 Host 20 GPIO1 3V8 Network Indicator 22 RESET_N Ferrite Bead 47pF Application Processor Open Drain Output 19 PWR_ON 1 00k Open Drain Output 0 0 TP TP 0 0 TP TP 1 8V Di...

Page 108: ...ation schemes the application device that integrates LISA U2 modules must be approved under all the certification schemes required by the specific application device to be deployed in the market The r...

Page 109: ...ating in conjunction with any other antenna or transmitter except as authorized in the certification of the product The gain of the system antenna s used for LISA U200 and LISA U230 modules i e the co...

Page 110: ...ipment should be installed and operated with a minimum distance of 20 cm between the radiator and the body of the user or nearby persons This transmitter must not be co located or operating in conjunc...

Page 111: ...ible for compliance could void the user s authority to operate the equipment 1 15 3 Innovation Science Economic Development Canada notice The ISED Canada formerly known as IC Industry Canada Certifica...

Page 112: ...resp o LISA U260 Contains IC 8595A LISAU200N resp o LISA U270 Contains IC 8595A LISAU200N resp Canada Industry Canada IC Notices This Class B digital apparatus complies with Canadian CAN ICES 3 B NMB...

Page 113: ...ww ic gc ca app sitt reltel srch nwRdSrch do lang fra Pour des informations suppl mentaires concernant l exposition aux RF au Canada rendez vous sur http www ic gc ca eic site smt gst nsf eng sf08792...

Page 114: ...270 modules have been certified by the Independent Communications Authority of South Africa ICASA LISA U200 LISA U270 1 15 6 KC Certification The regulatory Korean Certification have been granted for...

Page 115: ...ilian Agency of Telecommunications Ag ncia Nacional de Telecomunica es in Portuguese ANATEL LISA U200 modules ANATEL homologation number 08241 19 05903 08241 19 05903 LISA U201 modules ANATEL homologa...

Page 116: ...70 62S LISA U270 63S and LISA U270 68S modules comply with Japanese Telecom T and Radio R Law and have the GITEKI mark placed on the product label LISA U200 62S o T AD120274003 o R 003 120375 LISA U27...

Page 117: ...uggested low capacitance ESD protection and passive filtering parts on each SIM signal Check the UART signal directions since the signal names follow the ITU T V 24 Recommendation 3 Provide appropriat...

Page 118: ...es on the application board must be wide enough to minimize series resistance Ensure proper grounding Consider No routing areas for the Data Module footprint Optimize placement for minimum length of R...

Page 119: ...0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 1 9 20 21 22 23 24 25 26 27 GND VCC VCC VCC GND SPI_MRDY GPIO1 4 SPI_SRDY GPIO1 3 SPI_MISO GPIO1 2 SPI_MOSI GPIO1 1 SPI_SCLK GPIO1 0 GPIO9 I2S1 _WA GND GPIO8 I2S1 _...

Page 120: ...See section 2 2 1 4 5th Sensitive Pin Careful Layout Avoid coupling with noisy signals See section 2 2 1 5 Backup Voltage V_BCKP Power On PWR_ON 6th High speed digital pins Careful Layout Avoid coupl...

Page 121: ...layer below ANT and ANT_DIV pads The transmission line from the ANT pad and the ANT_DIV pad up to antenna connector s or up to the internal antenna s pad must be designed so that the characteristic im...

Page 122: ...line must be chosen depending on the thickness of the transmission line itself e g 35 m in the example of Figure 57 and Figure 58 the thickness of the dielectric material between the top layer where...

Page 123: ...lines Ensure no coupling occurs with other noisy or sensitive signals The antenna for the Rx diversity should be carefully separated from the main Tx Rx antenna to ensure that uncorrelated signals are...

Page 124: ...errite bead for GHz band noise a bypass capacitor with Self Resonant Frequency in 800 900 MHz range and a bypass capacitor with self resonant frequency in 1800 1900 MHz range as close as possible to t...

Page 125: ...le to 90 Ensure the common mode characteristic impedance ZCM is as close as possible to 30 Consider design rules for USB_D USB_D similar to RF transmission lines being them coupled differential micro...

Page 126: ...igh speed digital pins The following high speed digital pins require careful layout Serial Peripheral Interface SPI can be used for high speed data transfer UMTS HSPA between the LISA U2 modules and t...

Page 127: ...e analog inputs UART TXD RXD CTS RTS DSR RI DCD DTR the serial interface requires the same consideration regarding electro magnetic interference as the SIM card Keep the traces short and avoid couplin...

Page 128: ...shape or equivalent extending beyond the copper mask The solder paste should have a total thickness of 150 m The paste mask outline needs to be considered when defining the minimal distance to the nex...

Page 129: ...ed from any other digital circuits on the system board Provide enough clearance between the module and any external part due to solder and paste masks design Milled edges that are present at module PC...

Page 130: ...uring a GSM voice call at max TX power 19 C during GPRS data transfer with 4 TX slots at max TX power 16 C during EDGE data transfer with 4 TX slots at max TX power 25 C in UMTS HSxPA connection at ma...

Page 131: ...C in UMTS HSxPA connection at max TX power Beside the reduction of the Module to Ambient thermal resistance implemented by the hardware design of the application device integrating a LISA U2 module th...

Page 132: ...ported in section 1 15 1 for EU in section 1 15 2 2 for US FCC in section 1 15 3 1 for ISED Canada Some 2G and 3G bands are overlapping This depends on worldwide band allocation for telephony services...

Page 133: ...board select a short cable with minimum insertion loss The higher the additional insertion loss due to low quality or long cable the lower the connectivity Follow the recommendations of the antenna m...

Page 134: ...e power is delivered to the antenna and which portion is reflected by the antenna back to the module output A good antenna should have an S11 below 10 dB over the entire frequency band Due to miniatur...

Page 135: ...e g marker 3 in Figure 65 it is possible to make a judgment on the antenna under test if the performance is similar then the target antenna is good Figure 66 S11 and S21 comparison between a 900 MHz...

Page 136: ...SMD Antenna 824 960 MHz 1710 2170 MHz 35 0 x 9 0 x 3 2 mm 2J 2JE04 GSM WCDMA SMD Antenna 824 960 MHz 1710 2170 MHz 24 0 x 5 5 x 4 4 mm Yaego ANT3505B000TWPENA GSM WCDMA SMD Antenna 824 960 MHz 1710 21...

Page 137: ...vel dipole Antenna with SMA M connector 698 960 MHz 1575 42 MHz 1710 2170 MHz 2400 2700 MHz 148 6 x 49 x 10 mm Taoglas OMB 8912 03F21 GSM WCDMA pole mount Antenna with N type F connector 824 960 MHz 1...

Page 138: ...the following table Description Part Number Manufacturer DC Blocking Capacitor Murata GRM1555C1H220JA01 or equivalent RF Choke Inductor Murata LQG15HS68NJ02 LQG15HH68NJ02 or equivalent Self Resonance...

Page 139: ...iance with these directives implies conformity with the following European Norms for device ESD immunity ESD testing standard CENELEC EN 61000 4 2 11 and radio equipment standards EN 301 489 1 12 EN 3...

Page 140: ...ents stated in CENELEC EN 61000 4 2 11 EN 301 489 1 12 EN 301 489 52 13 Category Application Ref Design Immunity Level Remarks Contact Discharge to coupling planes indirect contact discharge Enclosure...

Page 141: ...ternal antenna and the antenna and its connecting cable do not provide a completely insulated enclosure able to provide protection to direct contact discharge up to 4 kV and protection to air discharg...

Page 142: ...ccessible point The RESET_N application circuit implemented in the EMC ESD approved reference designs of the LISA U2 series modules is described in Figure 20 and Table 19 section 1 6 3 2 5 3 3 SIM int...

Page 143: ...ow capacitance i e less or equal to 1 pF ESD protection device e g Tyco Electronics PESD0402 140 ESD protection device should be mounted on the USB_D and USB_D lines close to the accessible points i e...

Page 144: ...rator choices no cell condition when moving to poorly served or highly interfered areas In the latter case interference can be artificially injected in the environment by a noise generator covering a...

Page 145: ...orted This IP instance supports up to 7 sockets Using only external PDP contexts it is possible to have at most 3 IP instances with 3 different IP addresses simultaneously If in addition the internal...

Page 146: ...sh Message Authentication Code HMAC generation The security aspects used during a connection depend on the SSL TLS configuration and features supported Table 55 contains the settings of the default SS...

Page 147: ...YES12 TLS_RSA_WITH_AES_256_CBC_SHA256 0x00 0x3D YES12 TLS_RSA_WITH_3DES_EDE_CBC_SHA 0x00 0x0A YES12 TLS_RSA_WITH_RC4_128_MD5 0x00 0x04 NO13 TLS_RSA_WITH_RC4_128_SHA 0x00 0x05 NO13 TLS_PSK_WITH_AES_12...

Page 148: ...rial port from any host processor 3 10 Hybrid positioning and CellLocate Although GNSS is a widespread technology its reliance on the visibility of extremely weak GNSS satellite signals means that pos...

Page 149: ...ells historical observations as follows 1 Several devices reported their position to the CellLocate server when observing a specific cell the As in the picture represent the position of the devices wh...

Page 150: ...emented through a set of three AT commands that allow configuration of the GNSS receiver AT ULOCGNSS configuration of the CellLocate service AT ULOCCELL and requesting the position according to the us...

Page 151: ...oad The firmware is then installed overwriting the current version In case of power loss during this phase the boot loader detects a fault at the next wake up and restarts the firmware download from t...

Page 152: ...e interval the cellular functionality is automatically switched off and after a user defined delay re enabled to react to possible changes in radio coverage conditions For the detailed description see...

Page 153: ...s brought into the car The car phone accesses the GSM UMTS network using the remote SIM in the external device LISA U2 modules acting as an SAP client can be connected to an SAP server by a completely...

Page 154: ...e if present 3 18 Smart Temperature Management Cellular modules independent of the specific model always have a well defined operating temperature range This range should be respected to guarantee ful...

Page 155: ...nication interface which can take if possible the necessary actions to return to a safer temperature range or simply ignore the indication The module is still in a valid and good working condition Out...

Page 156: ...on only mode no further actions Send notification safe Previously outside of Safe Area Tempetature is back to safe area No No further actions Yes Figure 73 Smart Temperature Supervisor STS flow diagra...

Page 157: ...e Bearer Independent Protocol BIP for Over the Air SIM provisioning the data transfer from and to the SIM uses either an already active PDP context or a new PDP context established with the APN provid...

Page 158: ...set not supported by the 01 product versions see section 1 9 2 3 USB detection applying 5 V typ to VUSB_DET input see section 1 9 3 The connected USB host forces a remote wake up of the module as a U...

Page 159: ...fication 95 5 Sn 3 9 Ag 0 6 Cu 95 5 Tin 3 9 Silver 0 6 Copper 95 5 Sn 4 0 Ag 0 5 Cu 95 5 Tin 4 0 Silver 0 5 Copper Melting Temperature 217 C Stencil Thickness 150 m for base boards The final choice of...

Page 160: ...perature 40 60 seconds Peak reflow temperature 245 C Cooling phase A controlled cooling avoids negative metallurgical effects solder becomes more brittle of the solder and possible mechanical tensions...

Page 161: ...g Repeated reflow soldering processes and soldering the module upside down are not recommended Boards with components on both sides may require two reflow cycles In this case the module should always...

Page 162: ...ting of the module will void the warranty 4 2 10 Casting If casting is required use viscose or another type of silicone pottant The OEM is strongly advised to qualify such processes in combination wit...

Page 163: ...IMEI programming Measurement of voltages and currents Adjustment of ADC measurement interfaces Functional tests serial interface communication real time clock battery charger temperature sensor anten...

Page 164: ...c and to perform RF functional tests 5 2 1 Go No go tests for integrated devices A Go No go test is to compare the signal quality with a Golden Device in a position with excellent 2G 3G network covera...

Page 165: ...e AT UTEST command sets the module to emit RF power ignoring 2G 3G signaling protocol This emission can generate interference that can be prohibited by law in some countries The use of this feature is...

Page 166: ...ss or during handling ESD mechanical shock 4 Trigger RX measurement o To test the receiver signal level Assuming that there are no losses between the ANT pin or ANT_DIV pin and the input power source...

Page 167: ...orted by LISA U2 series Check audio requirements since Digital Audio Interfaces are supported by LISA U2 series modules Check the PWR_ON low pulse time specified to switch on the module since PWR_ON l...

Page 168: ...na through a 50 transmission line to allow transmission and reception of radio frequency RF signals in the 2G and 3G operating bands The recommendations of the antenna producer for correct installatio...

Page 169: ...rate LISA U2 series provide one additional USB CDC for the remote SIM Access Profile SAP The 5 pins of the SPI IPC Serial Interface can be configured as GPIOs on LISA U2 series The DDC I2C interface o...

Page 170: ...RSVD I2S_TXD RSVD I2S_WA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 V_BCKP GND V_INT RSVD GND GND GND DSR RI DCD DTR GND RTS CTS TXD RXD GND VUSB_DET PWR_ON GPIO1 GPIO2 RESET_N...

Page 171: ...Internal active pull up 125 A 13 RTS UART ready to send input RTS UART ready to send input Circuit 105 RTS in ITU T V 24 1 8 V typ LISA U1 series Internal active pull up 60 A LISA U2 series Internal a...

Page 172: ...n 4 20 V max External pull up e g to V_BCKP required LISA U2 series L level input 0 30 V min 0 65 V max H level input 1 50 V min 4 40 V max External pull up e g to V_BCKP required 20 GPIO1 GPIO GPIO1...

Page 173: ...U series Pad disabled Input Output Network Status Indication GNSS Supply Enable GNSS Data Ready default 24 GPIO4 GPIO GPIO4 GPIO Configurable GPIO 1 8 V typ LISA U1 series Output driver strength 4 mA...

Page 174: ...utput driver strength 2 mA 43 I2S_CLK LISA U120 LISA U130 I2S clock LISA U100 LISA U110 RESERVED pin I2S_CLK LISA U2 series 1st I2S clock input output I2S_CLK 1 8 V typ LISA U120 LISA U130 Output driv...

Page 175: ...LISA U2 series only Module Operating Mode Indication SIM card hot insertion removal UDCONF 52 RSVD RESERVED pin CODEC_CL K LISA U2 series Clock output LISA U2 series Digital clock output for external...

Page 176: ...110 A LISA U2 series SPI_MOSI and configurable GPIO 1 8 V typ Internal active pull up 240 A Output driver strength 6 mA Functions SPI_MOSI default Pad disabled Input Output 57 SPI_MISO SPI Data Line O...

Page 177: ...s VCC normal range 3 3 V min 4 4 V max VCC extended range 3 1 V min 4 5 V max 64 67 GND Ground GND Ground 68 ANT RF antenna ANT RF input output for main Tx Rx antenna 3G band support difference LISA U...

Page 178: ...22 4 mm 5 3 mm 5 25 mm 1 4 mm 1 0 mm PIN 1 LISA U1bottom side through moduleview Exposed GND on LISA U1module bottom layer Signals keep out area on application board Figure 79 Signals keep out area o...

Page 179: ...rnal Bus Interface Unit EDGE Enhanced Data rates for GSM Evolution E GPRS Enhanced GPRS FDD Frequency Division Duplex FEM Front End Module FOAT Firmware Over AT commands FTP File Transfer Protocol FTP...

Page 180: ...ave SIM Subscriber Identification Module SMS Short Message Service SMTP Simple Mail Transfer Protocol SPI Serial Peripheral Interface SRAM Static RAM TCP Transmission Control Protocol TDMA Time Divisi...

Page 181: ...atibility and Radio spectrum Matters ERM Electromagnetic Compatibility EMC standard for radio equipment and services Part 1 Common technical requirements 13 ETSI EN 301 489 52 Electromagnetic Compatib...

Page 182: ...on with old doc number 3G G2 HW 10002 B 15 Jul 2013 sses Advance Information status First release for LISA U200 02S LISA U200 61S LISA U200 62S LISA U260 02S LISA U270 02S LISA U270 62S B1 21 Aug 2013...

Page 183: ...lox com Regional Office China Beijing Phone 86 10 68 133 545 Email info_cn u blox com Support support_cn u blox com Regional Office China Chongqing Phone 86 23 6815 1588 Email info_cn u blox com Suppo...

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