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MBa57xx
User's Manual

MBa57xx UM 0100
15.04.2020

Summary of Contents for MBa57 Series

Page 1: ...MBa57xx User s Manual MBa57xx UM 0100 15 04 2020...

Page 2: ...2 I2 C address mapping 12 4 1 3 Temperature sensor 13 4 1 4 RTC backup 13 4 1 5 Port Expander 14 4 1 6 Power Management and Reset 15 4 1 7 Power supply 17 4 1 7 1 Protective circuitry 18 4 1 7 2 Power...

Page 3: ...EMC 52 7 2 ESD 52 7 3 Operational safety and personal security 52 8 CLIMATIC AND OPERATIONAL CONDITIONS 52 8 1 Protection against external effects 52 8 2 Reliability and service life 52 9 ENVIRONMENT...

Page 4: ...Table 26 Pinout RS 485 X7 25 Table 27 RS 485 termination DIP switch S5 25 Table 28 Pinout Debug RS 232 X8 26 Table 29 Pinout Debug USB X10 26 Table 30 Debug interface DIP switch S6 26 Table 31 Type o...

Page 5: ...et 10 100 1000BASE T 23 Illustration 13 Block diagram CAN 24 Illustration 14 Block diagram RS 485 25 Illustration 15 Block diagram RS 232 Debug 26 Illustration 16 Block diagram LVDS 27 Illustration 17...

Page 6: ...rademarks are rightly protected by a third party 1 3 Disclaimer TQ Systems GmbH does not guarantee that the information in this User s Manual is up to date correct complete or of good quality Nor does...

Page 7: ...used This symbol represents important details or aspects for working with TQ products Command A font with fixed width is used to denote commands file names or menu items 1 7 Handling and ESD tips Gen...

Page 8: ...e manufacturer s specifications of the components used for example CompactFlash cards are to be taken note of They contain if applicable additional information that must be taken note of for safe and...

Page 9: ...rovided by the TQMa57xx are available on the MBa57xx The function of the AM57xx can be evaluated and therefore the software development for a TQMa57xx project can start immediately The MBa57xx support...

Page 10: ...B Debug 1 X10 USB Micro AB Ethernet Gbit 2 X52 X53 RJ45 2 with integrated magnetics Ethernet 10 100 Base T 2 X21 RJ45 Double with integrated magnetics CAN 2 X5 X6 Phoenix 3 pin Galvanically separated...

Page 11: ...ATA status 8 Green LED Power LEDs 24V 12V 5V 3 3V 3 3V mPCIe 1 8V 1 5V 1 1V 1 Green LED Debug LEDs for USB debug interface 1 Green red LED Reset LED 8 Green yellow LED Ethernet LEDs Activity Speed Pow...

Page 12: ...AM5728 and AM5748 The maximum clock rate of the CPUs is 1 5 GHz the DSPs can be clocked with up to 750 MHz The AM574x supports ECC and Secure Boot More detailed information can be found in the TQMa57...

Page 13: ...3 V JTAG JTAG_EMU1 55 56 GPIO5_5_J11 GPIO 3 3 V I O J11 G21 I O 3 3 V JTAG JTAG_EMU0 57 58 DGND GND 0 V P P 0 V GND DGND 59 60 MCASP8_ACLKX AUDIO 3 3 V I O B17 E12 I O 3 3 V GPIO GPIO5_6_E12 61 62 MC...

Page 14: ...PR1_MII1_RXD0 RGMII1_RXCTL ENET 3 3 V I A3 C4 I O 3 3 V ENET PR1_MII1_RXDV RGMII1_TXD2 37 38 PR1_MII1_RXD1 RGMII1_RXC ENET 3 3 V I C5 C3 I O 3 3 V ENET PR1_MII1_MR_CLK RGMII1_TXD3 39 40 DGND GND 0 V...

Page 15: ...8 V Boot GPMC GPMC_AD 13 GPIO1_19 35 36 GPMC_A 10 GPIO2_0 GPMC 1 8 V O N9 H2 I O 1 8 V Boot GPMC GPMC_AD 14 GPIO1_20 37 38 GPMC_A27_AF4 GPIO3_19 GPMC 3 3 V O AF4 H3 I O 1 8 V Boot GPMC GPMC_AD 15 GPI...

Page 16: ...59 60 HDMI1_DATA2X HDMI 1 8 V O AG19 P 0 V GND DGND 61 62 DGND GND 0 V P R6 I O 1 8 V GPIO GPIO7_3_R6 63 64 QSPI_SCK QSPI 1 8 V O R2 Y9 I 3 3 V SD MMC1_SDWP 65 66 QSPI_RTCLK QSPI 1 8 V I R3 P 0 V GND...

Page 17: ...multiplexing The following table shows the signals used on the two I2 C interfaces Table 8 I2 C signals Signal Direction MBa57xx Remark I2C4_SDA I O X1 88 2 7 k PU to 3 3 V on MBa57xx I2C4_SCL O X1 9...

Page 18: ...backup The TQMa57xx provides a DS1339U 33 RTC which is connected to the I2C1 bus To supply the RTC on the TQMa57xx a 3V lithium battery type CR2032 with very low self discharge is mounted on the MBa5...

Page 19: ..._2 I Push button IO0_3 BUTTON_3 I Push button IO0_4 LCD_EN O Enable LCD X56 IO0_5 USB3 0_H3_OTG_ID I USB ID for OTG IO0_6 PR2_MII0_RST O 10 100 Base Ethernet reset IO0_7 PR2_MII1_RST O 10 100 Base Eth...

Page 20: ...t Remark PMIC_REGEN1 TQMa57xx PMIC O Low Is activated by the TQMa57xx during power sequencing and switches on the carrier board controller for 3 3 V PWR_EN_3V3_DISPLAY Port Expanders PCA9555PW O Low E...

Page 21: ...reset O High CPU hard reset signal as indicator TQMA57_RST_IN I High See TQMa57xx User s Manual push button S8 FTDI JTAG TQMA57_RST_OUT TQMa57xx O High See TQMa57xx User s Manual Active when AM57 rese...

Page 22: ...power The following table shows the voltages at the interfaces and headers on the MBa57xx Table 14 Voltages at MBa57xx headers Connector 1 5 V 3 3 V 5 V 12 V X11 JTAG X12 X13 100 Mbit Eth X14 SD card...

Page 23: ...circuit Parameter Min Typ Max Overcurrent limitation by fuse slow blow 4 A Excess voltage limitation by SMBJ24CA 26 7 V 29 5 V 4 1 7 2 Power consumption The MBa57xx including a TQMa57xx consumes 85 W...

Page 24: ...on switches type TPS2561DRC The switches have current monitoring and can switch off the bus voltage in case of overload and or overheating Please refer to the data sheets of the switch for detailed in...

Page 25: ...P_L I O Common Mode Choke in series 13 DGND DGND P 14 SSRX USB3 0_H1_RXN_L I O Common Mode Choke in series 15 SSRX USB3 0_H1_RXP_L I O Common Mode Choke in series 16 DGND DGND P 17 SSTX USB3 0_H1_TXN_...

Page 26: ...nificantly deviate depending on the hardware and software used Illustration 10 Block diagram USB 2 0 Hosts The following tables show the pin assignment of the connectors used Table 19 Pinout X55 USB 2...

Page 27: ...nificantly deviate depending on the hardware and software used Illustration 11 Block diagram USB 2 0 Hi Speed OTG The USB OTG interface of the TQMa57xx is connected on the MBa57xx to the USB2 0 Micro...

Page 28: ...net interfaces have their own PHY reset and interrupt signals The PHY DP83867 has boot straps to start with adjustable default values All boot straps can be adapted by means of assembly options Furthe...

Page 29: ...and X6 Both interfaces are galvanically isolated with 1 kV The CAN interfaces are not galvanically isolated from each other The CAN signals can be terminated with 120 using DIP switches S3 and S7 Tab...

Page 30: ...ntrolled by UART10_RTS The assembly option is shown in the MBa57xx circuit diagram Illustration 14 Block diagram RS 485 Table 26 Pinout RS 485 X7 Pin Pin name Signal Dir Remark 1 A RS485_A I Galvanica...

Page 31: ...n is required Illustration 15 Block diagram RS 232 Debug Table 28 Pinout Debug RS 232 X8 Pin Signal 1 4 6 7 8 9 NC 2 RS232_RX 3 RS232_TX 5 DGND M1 M2 DGND Table 29 Pinout Debug USB X10 Pin Signal 1 US...

Page 32: ...ell as 3 3 V and 5 V The second connector 20 pin X55 provides control lines and USB signals as well as 12 V and 5 V A High level at LVDS_SHDN switches the LVDS transceiver on a Low level at LVDS_SHDN...

Page 33: ...tected 3 LVDS_TX1_N ESD protected 4 LVDS_TX1_P ESD protected 5 LVDS_TX2_N ESD protected 6 LVDS_TX2_P ESD protected 7 DGND 8 LVDS_CLK_N ESD protected 9 LVDS_CLK_P ESD protected 10 LVDS_TX3_N ESD protec...

Page 34: ...4 DGND 5 DGND 6 DGND 7 5 V 8 5 V 9 DGND 10 DGND 11 USB2_H1_VBUS ESD protected 12 DGND 13 USB_H2 0_H1_N ESD protection Common Mode Choke in series 14 USB_H2 0_H1_P ESD protection Common Mode Choke in s...

Page 35: ...ation Line Out headphone Mode R12 R13 R14 R15 Line Out default NP NP 0 0 Headphone optional 0 0 NP NP Table 35 Pinout Line Out X16 Pin Signal Remark 1 GND_AUDIO 2A 2B AUDIO_OUT_L 1 F and 100 in series...

Page 36: ...ted Illustration 18 Block diagram SD card Table 38 Pinout SD card X14 Pin Pin name Signal Remark 1 CD DAT3 CS MMC1_DAT3 10 k PU to 3 3 V ESD protection 2 CMD DI MMC1_CMD 10 k PU to 3 3 V ESD protectio...

Page 37: ...ck is not PCIe compliant For this reason a PCIe compliant clock is generated on the MBa57xx with a 9FGV0241AKILF clock generator Detailed information can be found in the MBa57xx circuit diagram Illust...

Page 38: ...tor A15 DGND A16 PCIE_RXP0 100 nF in series A17 PCIE_RXN0 100 nF in series A18 DGND A19 NC A20 DGND A21 NC A22 NC A23 DGND A24 DGND A25 NC A26 NC A27 DGND A28 DGND A29 NC A30 NC A31 DGND A32 NC B1 VCC...

Page 39: ...ed information can be found in the MBa57xx circuit diagram Illustration 20 Block diagram Mini PCIe Table 41 Maximum currents Mini PCIe Parameter Min Typ Max Current 3 3 V 0 1 1 A Current 1 5 V 0 0 375...

Page 40: ...y option 10 k PU to 3 3 V or PD 0 to GPIO_EXP_IO6 Default none 23 PCIE_RXN1 100 nF in series 24 VCC3V3_MPCIE See Table 41 25 PCIE_RXP1 100 nF in series 26 DGND 27 DGND 28 VCC1V5_MPCIE See Table 41 29...

Page 41: ...C4 NA C5 DGND DGND C6 VPP SIM_VPP C7 DATA SIM_DATA SW1 2 4 2 14 SATA The MBa57xx provides an M 2 interface for M 2 SATA cards sizes 2242 2260 or 2280 Illustration 21 Block diagram SATA Attention Spac...

Page 42: ...PU to 3 3 V 22 26 NC 27 DGND 28 32 NC 33 DGND 34 37 NC 38 DEVSLEEP Assembly option 100 k PU to 3 3 V or 0 to DGND Default none 39 DGND 40 NC 41 SATA1_RXP0 10 nF in series 42 NC 43 SATA1_RXN0 10 nF in...

Page 43: ...the pinout of the HDMI interface Table 45 Pinout HDMI X27 Pin Signal Remark P1 CON_HDMI_TX2 P2 DGND P3 CON_HDMI_TX2 P4 CON_HDMI_TX1 P5 DGND P6 CON_HDMI_TX1 P7 CON_HDMI_TX0 P8 DGND P9 CON_HDMI_TX0 P10...

Page 44: ...ETH2_MII0 ETH2_MDIO PR2_MDIO_MDCLK 5 6 PR2_MII0_RXD 2 ETH2_MII0 ETH2_MII0 PR2_MII0_COL 7 8 PR2_MII0_RXD 3 ETH2_MII0 ETH2_MII0 PR2_MII0_CRS 9 10 PR2_MII0_MT_CLK ETH2_MII0 ETH2_MII0 PR2_MII0_MR_CLK 11 1...

Page 45: ...0 PR1_PRU0_GPI4_AH4 15 16 PR1_PRU0_GPO8_AG5 PR1_PRU0 I2 C Expander GPIO_EXP_IO5 3 17 18 PR1_PRU0_GPO9_AF2 PR1_PRU0 I2 C Expander GPIO_EXP_IO6 4 19 20 GPIO2_1_P9 GPIO2 Group Signal Pin Signal Group I2...

Page 46: ...4 GPIO5 GPIO5_9_D12 15 16 GPIO4_5_D2 GPIO4 MCASP4 MCASP4_C18 17 18 GPIO5_1_J14 GPIO5 MCASP2 MCASP2_A15 19 20 GPIO5_5_J11 GPIO5 Group Signal Pin Signal Group MCASP2 MCASP2_B15 1 X44 2 GPIO3_28_E1 GPIO3...

Page 47: ...4 GPIO3_23_AE1 9 GPIO3 Reset RSTOUT_FROM_TQMA57 15 16 NMIN_DSP INTC Reset PORZ_FROM_TQMA57 17 18 CPU_WAKEUP0_TO_TQMA57 RTC Power DGND 19 20 DGND Power Group Signal Pin Signal Group Power VCC3V3 1 X46...

Page 48: ...Power VUSB_VBUS2 9 10 VBAT_3V Power Power DGND 11 12 VCC12V Power Power USB2_SATA_VBUS 13 14 VCC1V7_E FUSE Power Power DGND 15 16 DGND Power Power USB2_MPCIE_VBUS 17 18 NC Power DGND 19 20 NC Group Si...

Page 49: ...GPMC_AD 4 GPMC GPMC GPMC_A 6 13 14 GPMC_AD 5 GPMC GPMC GPMC_A 7 15 16 GPMC_AD 6 GPMC GPMC GPMC_A 8 17 18 GPMC_AD 7 GPMC GPMC GPMC_A 9 19 20 GPMC_AD 8 GPMC Group Signal Pin Signal Group GPMC GPMC_A 10...

Page 50: ...T1_D_R 13 LCD LCD VOUT1_D_R 10 23 24 VOUT1_D_R 15 LCD LCD VOUT1_D_R 12 25 26 VOUT1_D_R 17 LCD LCD VOUT1_D_R 14 27 28 VOUT1_D_R 19 LCD LCD VOUT1_D_R 16 29 30 VOUT1_D_R 21 LCD LCD VOUT1_D_R 18 31 32 VOU...

Page 51: ...I2C4 0x21 Port IO0_4 lit when port high Power V22 Green Status 24 V lit when supply 24 V active V21 Green Status 12 V lit when supply 12 V active V23 Green Status 5 V lit when supply 5 V active V24 Y...

Page 52: ...3 3 Buzzer Illustration 25 Block diagram buzzer The MBa57xx provides a buzzer The buzzer can be activated by GPIO6_19_B26 X2 69 of the TQMa57xx or by IO0_0 from Port Expander II D23 see Table 11 A hi...

Page 53: ...oot sources Further settings such as transfer modes and CPU clock can be found in the User s Manual of the TQMa57xx 12 Switch position 1 means ON switch position 0 means OFF Table 54 Boot Mode configu...

Page 54: ...e 55 JTAG DIP switch S13 DIP switch S13 Remark ON JTAG on USB Micro AB connector X10 via FTDI chip OFF JTAG signals on header X11 The following table shows the pin assignment of the JTAG connector Tab...

Page 55: ...ction tool MOZIa57xx 6 2 Thermal management For cooling the MBa57xx and the TQMa57xx up to 8 4 W must be dissipated if no other devices are connected Further power dissipation may occur at additionall...

Page 56: ...e 51 6 3 Assembly Illustration 28 Component placement top Illustration 29 Component placement bottom The labels on the MBa57xx show the following information Table 57 Labels on MBa57xx Label Text AK1...

Page 57: ...en from the circuit diagram 7 3 Operational safety and personal security Due to the occurring voltages 30 V DC tests with respect to the operational and personal safety have not been carried out 8 CLI...

Page 58: ...ally only mounted in sockets 9 6 2 Lithium batteries The requirements concerning special provision 188 of the ADR section 3 3 are complied with for Lithium batteries There is therefore no classificati...

Page 59: ...rically Erasable Programmable Read Only Memory EMC Electromagnetic Compatibility EMI Electromagnetic Interference eMMC embedded Multi Media Card EN Europ ische Norm European Standard ESD Electro Stati...

Page 60: ...Red Green Blue RGMII Reduced Gigabit Media Independent Interface RJ45 Registered Jack 45 RMII Reduced Media Independent Interface RoHS Restriction of the use of certain Hazardous Substances RS 232 RS...

Page 61: ...con datasheet Rev F 2 0 03 2019 TI 5 AM572x Sitara Processors Technical Reference Manual Rev K 0 12 2017 TI 6 AM572x Sitara Processors Silicon Errata Rev L 2 0 03 2018 TI 7 AM571x Sitara Processors Si...

Page 62: ...TQ Systems GmbH M hlstra e 2 l Gut Delling l 82229 Seefeld Info TQ Group TQ Group...

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