TQ MBa57 Series, User Manual

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User's Manual l MBa57xx UM 0100 l © 2020, TQ-Systems GmbH Page 49
4.3.7 JTAG
The JTAG interface is routed to a 20-pin header X11. 10 kΩ PUs for signals TDI, TDO, TMS, TRST#, and SRST#, and 10 kΩ PDs for
signals TCK, and RTCK are assembled on the MBa57xx. The JTAG interface is designed for 3.3 V. It has no ESD protection.
Illustration 27: Block diagram JTAG
With DIP switch S13 the interface can be switched between pin header X11 and USB Micro-AB connector X10.
Information on this can be found in the MBa57xx circuit diagram.
Table 55: JTAG, DIP switch S13
DIP switch S13 Remark
ON JTAG on USB Micro-AB connector X10 via FTDI chip
OFF JTAG signals on header X11
The following table shows the pin assignment of the JTAG connector.
Table 56: Pinout JTAG, X11
Pin Signal Dir. Remark
1 JTAG_VREF P 100 Ω in series to 3.3 V, use only as reference
2 VCC3V3 P 0 Ω to 3.3 V, I
max
= 10 mA
3 JTAG_TRST# I 10 kΩ PU to 3.3 V
4 DGND P –
5 JTAG_TDI I 10 kΩ PU to 3.3 V
6 DGND P –
7 JTAG_TMS I 10 kΩ PU to 3.3 V
8 DGND P –
9 JTAG_TCK I 22 Ω in series, 10 kΩ PD
10 DGND P –
11 JTAG_RTCK P 10 kΩ PD
12 DGND P –
13 JTAG_TDO O 10 kΩ PU to 3.3 V
14 DGND P –
15 JTAG_SRST# I 10 kΩ PU to 3.3 V; open drain buffer at RESET_IN#
16 DGND P –
17 VCC3V3 P 10 kΩ to 3.3 V
18 DGND P –
19 DGND P 10 kΩ to DGND
20 DGND P –