TQ MBa57 Series, User Manual

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User's Manual l MBa57xx UM 0100 l © 2020, TQ-Systems GmbH Page 11
4.1.1.3 Pinout TQMa57xx (continued)
Table 7: Pinout connector X4, (TQMa57xx: X4)
Ball Type Level Group Signal Pin Signal Group Level Type Ball
– P 0 V GND DGND 1 2 USB3.0_DRVVBUS USB 3.3 V O AB10
AC12 I/O 3.3 V USB USB3.0_DM 3 4 DGND GND 0 V P –
AD12 I/O 3.3 V USB USB3.0_DP 5 6 DGND GND 0 V P –
– P 0 V GND DGND 7 8 DGND GND 0 V P –
AC11 O 1.8 V USB USB3.0_TXN0 9 10 USB3.0_RXP0 USB 1.8 V I AE12
AD11 O 1.8 V USB USB3.0_TXP0 11 12 USB3.0_RXN0 USB 1.8 V I AF12
– P 0 V GND DGND 13 14 DGND GND 0 V P –
AE11 I/O 3.3 V USB USB2.0_DP 15 16 USB2.0_DM USB 3.3 V I/O AF11
AC16 I 3.3 V USB USB2.0_OTG_ID 17 18 USB2.0_DRVVBUS USB 3.3 V O AC10
– P 0 V GND DGND 19 20 DGND GND 0 V P –
AH9 I 1.8 V SATA SATA1_RXN0 21 22 SATA1_TXN0 SATA 1.8 V O AG10
AG9 I 1.8 V SATA SATA1_RXP0 23 24 SATA1_TXP0 SATA 1.8 V O AH10
– P 0 V GND DGND 25 26 DGND GND 0 V P –
– P 0 V GND DGND 27 28 PCIE_RXN1 PCIE 1.8 V I AG11
– P 0 V GND DGND 29 30 PCIE_RXP1 PCIE 1.8 V I AH11
AG13 I 1.8 V PCIE PCIE_RXN0 31 32 DGND GND 0 V P –
AH13 I 1.8 V PCIE PCIE_RXP0 33 34 DGND GND 0 V P –
– P 0 V GND DGND 35 36 PCIE_TXN1 PCIE 1.8 V O AG12
– P 0 V GND DGND 37 38 PCIE_TXP1 PCIE 1.8 V O AH12
AG15 I 1.8 V PCIE PCIE_CLKP 39 40 DGND GND 0 V P –
AH15 I 1.8 V PCIE PCIE_CLKN 41 42 DGND GND 0 V P –
– P 0 V GND DGND 43 44 PCIE_TXN0 PCIE 1.8 V O AG14
– P 0 V GND DGND 45 46 PCIE_TXP0 PCIE 1.8 V O AH14
AG16 O 1.8 V HDMI HDMI1_CLOCKX 47 48 DGND GND 0 V P –
AH16 O 1.8 V HDMI HDMI1_CLOCKY 49 50 DGND GND 0 V P –
– P 0 V GND DGND 51 52 DGND GND 0 V P –
AG18 O 1.8 V HDMI HDMI1_DATA1X 53 54 HDMI1_DATA0X HDMI 1.8 V O AG17
AH18 O 1.8 V HDMI HDMI1_DATA1Y 55 56 HDMI1_DATA0Y HDMI 1.8 V O AH17
– P 0 V GND DGND 57 58 DGND GND 0 V P –
AH19 O 1.8 V HDMI HDMI1_DATA2Y 59 60 HDMI1_DATA2X HDMI 1.8 V O AG19
– P 0 V GND DGND 61 62 DGND GND 0 V P –
R6 I/O 1.8 V GPIO GPIO7_3_R6 63 64 QSPI_SCK QSPI 1.8 V O R2
Y9 I 3.3 V SD MMC1_SDWP 65 66 QSPI_RTCLK QSPI 1.8 V I R3
– P 0 V GND DGND 67 68 QSPI_SS1# QSPI 1.8 V O P1
W6 O 3.3 V SD MMC1_CLK 69 70 DGND GND 0 V P –
Y6 I/O 3.3 V SD MMC1_CMD 71 72 QSPI_DATA0 QSPI 1.8 V I/O U1
AA6 I/O 3.3 V SD MMC1_DAT[0] 73 74 QSPI_DATA1 QSPI 1.8 V I/O P3
Y4 I/O 3.3 V SD MMC1_DAT[1] 75 76 QSPI_DATA2 QSPI 1.8 V I/O U2
AA5 I/O 3.3 V SD MMC1_DAT[2] 77 78 QSPI_DATA3 QSPI 1.8 V I/O T2
Y3 I/O 3.3 V SD MMC1_DAT[3] 79 80 DGND GND 0 V P –
W7 I 3.3 V SD MMC1_SDCD 81 82 QSPI_SS0# QSPI 1.8 V O P2
– P 0 V GND DGND 83 84 GPIO3_22_AE5 GPIO 3.3 V I/O AE5
AE9 I/O 3.3 V GPIO GPIO3_2_AE9 85 86 GPIO3_23_AE1 GPIO 3.3 V I/O AE1
AF8 I/O 3.3 V GPIO GPIO3_3_AF8 87 88 GPIO3_24_AE2 GPIO 3.3 V I/O AE2
– P 0 V GND DGND 89 90 GPIO3_25_AE6 GPIO 3.3 V I/O AE6
AF6 I/O 3.3 V GPIO GPIO3_17_AF6 91 92 GPIO3_26_AD2 GPIO 3.3 V I/O AD2
AF3 I/O 3.3 V GPIO GPIO3_18_AF3 93 94 GPIO3_27_AD3 GPIO 3.3 V I/O AD3
AF1 I/O 3.3 V GPIO GPIO3_20_AF1 95 96 PR1_PRU0_GPO5_AG4 ENET 3.3 V O AG4
AE3 I/O 3.3 V GPIO GPIO3_21_AE3 97 98 DGND GND 0 V P –
AG7 I/O 3.3 V GPIO GPIO3_6_AG7 99 100 PR1_PRU0_GPO6_AG2 ENET 3.3 V O AG2
AH3 I 3.3 V ENET PR1_PRU0_GPI1_AH3 101 102 PR1_PRU0_GPO7_AG3 ENET 3.3 V O AG3
AH5 I 3.3 V ENET PR1_PRU0_GPI2_AH5 103 104 PR1_PRU0_GPO8_AG5 ENET 3.3 V O AG5
– P 0 V GND DGND 105 106 PR1_PRU0_GPO9_AF2 ENET 3.3 V O AF2
AG6 I 3.3 V ENET PR1_PRU0_GPI3_AG6 107 108 GPIO2_28_N2 GPIO 1.8 V I/O N2
AH4 I 3.3 V ENET PR1_PRU0_GPI4_AH4 109 110 GPIO2_30_AG8 GPIO 3.3 V I/O AG8
AC17 I/O 3.3 V GPIO GPIO1_1_AC17 111 112 GPIO2_31_AH7 GPIO 3.3 V I/O AH7
AB16 I/O 3.3 V GPIO GPIO1_2_AB16 113 114 DGND GND 0 V P –
P9 I/O 1.8 V GPIO GPIO2_1_P9 115 116
MCASP5_AA4
(PR2_PRU1_GPO4)
AUDIO 3.3 V I/O AA4
P4 I/O 1.8 V GPIO GPIO2_2_P4 117 118
MCASP5_AB3
(PR2_PRU1_GPO3)
AUDIO 3.3 V I/O AB3
– P 0 V GND DGND 119 120 DGND GND 0 V P –