6-14
2-7. PLL Circuit (1)
TLC2933IPW is used in the PLL circuit. The pin configu-
ration is shown in Fig. 6-17, the terminal functions are in
table 6-7 and the internal block diagram is shown in Fig. 6-
18. The circuit diagram for the PLL circuit is shown in Fig.
6-19. The IC is composed of a VCO able to lock in 40 – to
100 MHz and PFD. In this unit, a perfect integration type
loop filter is provided by combining the IC and an op. am-
plifier (Q701, M33087M).
The center frequency of VCO varies depending on the con-
stant value of R708, and with 3.3 k
W
selected the lock en-
able frequency is approx. 40 – 85 MHz.
TLC2933IPW
VCO
CHARGE
PUMP
PFD
fsc
PFD
OUTPUT
BIAS
SUPPLY
CONTROL
VOLTAGE
VCO
INHIBIT
REFERENCE
INPUT
COMPARISON
INPUT
PFD INHIBIT
R
E
NG
OSCILLATOR
BIAS
CONTROL
Fig. 6-18 TLC2933IPW internal block diagram
1
2
3
4
5
6
7
LOGIC V
DD
TEST
VCO OUT
F
IN
-A
F I
N
-B
PFD OUT
LOGIC GND
14
13
12
11
10
9
8
VCO V
DD
R
BIAS
V
COIN
VCO GND
VCO INHIBIT
PFD INHIBIT
NC
Fig. 6-17 Pin configuration of TLC2933IPW
Table 6-7 TLC2933IPW pin function
Pin No.
Name
Function
1
LOGIC V
DD
Power supply voltage supply terminal for internal logic circuit (PFD section, I/O section).
Desirable to be separated from power supply voltage supply terminal for VCO completely.
2
TEST
Used at test. Connect to GND at normal operation.
3
VCO OUT
VCO output terminal. Fixed to "L" level at inhibit.
4, 5
F
IN
- A,
F
IN
- B
Input terminal for reference frequency input (f
REF
-IN) and comp. signal dividing VCO output by external
counter.
Input f
REF
-IN to F
IN
-A terminal at rag-read filter use and comp. signal from external counter to F
IN
-B.
6
PFD OUT
PFD output terminal. Fixed to high impedance at PFD ihibit.
7
LOGIC GND
GND terminal for internal logic circuit
8
N.C.
Internal not connected terminal.
9
PFD INHIBIT
PFD inhibit function control terminal.
10
VCO INHIBIT
VCO inhibit function control terminal.
11
VCO GND
VCO GND terminal
12
V
CDIN
VCO control voltage input terminal. Normally input VCO oscillation control voltage from LPF output
formed at external circuit.
13
R
BIAS
VCO bias supply resistor connection terminal.
Supply bias to operate VCO oscillation and insert a resistor between the terminal and VCO power supply
line in order to set/adjust the oscillation frequency range.
14
VCO V
DD
VCO power supply voltage supply terminal.
Desirable to be separated from power supply voltage supply terminal for internal logic.
Summary of Contents for TLP411E
Page 1: ...FIE NO 336 9612 Dec 1996 TECHNICAL TRAINING MANUAL 3 LCD DATA PROJECTOR TLP411U TLP411E ...
Page 4: ...1 1 SECTION I MAIN POWER SUPPLY CIRCUIT ...
Page 10: ...2 1 SECTION II LAMP HIGH VOLTAGE POWER SUPPLY CIRCUIT ...
Page 12: ...3 1 SECTION III OPTICAL SYSTEM ...
Page 16: ...4 1 SECTION IV RGB DRIVE CIRCUIT ...
Page 25: ...5 1 SECTION V MICROCOMPUTER ...
Page 39: ...6 1 SECTION VI DIGITAL CIRCUIT ...
Page 63: ...7 1 SECTION VII VIDEO SIGNAL PROCESS CIRCUIT ...
Page 77: ...8 1 SECTION VIII CCD CAMERA CIRCUIT ...
Page 80: ...9 1 SECTION IX FLUORESCENT LAMP INVERTER CIRCUIT ...
Page 83: ...9 4 3 CIRCUIT DIAGRAM Fig 9 5 Cicuit diagram ...