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SIF5600 - Manual - 03 - 2008
- no response returned: a some serious communication error is occured.
It is possible to program the protection so that response to the master with a settable delay; such delay
is composed by two times:
- en_delay: delay to the activation of Slave transmitter
- tx_delay: delay to the transmission of Slave response.
The time <en_delay> allows to overcome the possible one ‘tail’ (you see A-B) of the transmitter master
that hocks the communication line.
The time <tx_delay> allows the stabilization of the communication line before activating the transmission
of the response.
A B
driver 485 tx ON--------------+
MASTER tx ...XXXXXXXX |
driver 485 tx OFF +----------------------------------
+-----------+ <- en_delay (A-C)
+--------+ <- tx_delay (C-D)
C D
driver 485 tx ON +----------------------------
SLAVE tx ...XXXXXXXX | XXXXXXXXXXXXXXXXX...
driver 485 tx OFF-------------------+
where:
B Master ‘request’ transmission expiring time
B Master transmitter disable
C Slave transmitter enable
D Slave ‘answer’ start transmission
For minimum answer time, both timers must be set to zero.
3.3 Message frame format
The general ModBus RTU frame message is the following:
| ADDR | FUNC | ...BODY... | CRCH | CRCL |
|------|------|----------------|--------|--------|
byte 1 byte 2 ... byte n-1 byte n
where:
ADDR protection relay addressing:
- 0 = broadcast
- 1...247 = slave address
FUNC function code:
- 04 read input RREG register
- 03 read output WREG register
- 06 preset single WREG register
- 16 preset multiple WREG registers
- 08 loopback diagnostic test
BODY data body: contents depends from the FUNC code
CRCH MSB CRC byte
CRCL LSB CRC byte
BODY contents within message depends from FUNC code.
In the following paragraphs only the BODY field is described, for the rest please refer to the general
form of the message.
3.4 CRC: Cyclical Redundancy Check
The CRC (Cyclical Redundancy Check) assures that during transmission no corruptions of the message are
occured.
For information on the computed method, please refer to the ModBus literature.
3.5 Data transmission order
Every INT, ENUM or B16 data, expressed by a register (2 bytes), is sent according to the following order
(left to right):
... | REG | ...
... | H | L | ...
|--------|--------|
byte n byte n+1 example:
11h 22h --> ENUM == 1122h (4386 dec)