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TMS380C26
NETWORK COMMPROCESSOR
SPWS010A–APRIL 1992–REVISED MARCH 1993
POST OFFICE BOX 1443
•
HOUSTON, TEXAS
77251–1443
45
PARAMETER MEASUREMENT INFORMATION
78
77
76
75a
74a
75
74
75
74
75
74
MBCLK1
MBCLK2
MBEN
MDDIR
MAL
MBIAEN
MBRQ
MBGR
Figure 12. Memory Bus Timing: TMS380C26 Releases Control of Bus (continued)