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TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
www.ti.com
SPRS698F – NOVEMBER 2010 – REVISED MARCH 2016
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TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065
TMS320F28064 TMS320F28063 TMS320F28062
Table of Contents
Copyright © 2010–2016, Texas Instruments Incorporated
Table of Contents
1
Device Overview
.........................................
1
1.1
Features
..............................................
1
1.2
Applications
...........................................
2
1.3
Description
............................................
2
1.4
Functional Block Diagram
............................
3
1.5
System Device Diagram
..............................
4
2
Revision History
.........................................
6
3
Device Comparison
.....................................
7
4
Terminal Configuration and Functions
..............
9
4.1
Pin Diagrams
.........................................
9
4.2
Signal Descriptions
..................................
11
5
Specifications
...........................................
19
5.1
Absolute Maximum Ratings
........................
19
5.2
ESD Ratings for TMS320F2806xU
.................
19
5.3
ESD Ratings for TMS320F2806x,
TMS320F2806xM, and TMS320F2806xF
..........
19
5.4
Recommended Operating Conditions
...............
20
5.5
Electrical Characteristics
............................
20
5.6
Power Consumption Summary
......................
21
5.7
Thermal Resistance Characteristics
................
25
5.8
Thermal Design Considerations
....................
27
5.9
Emulator Connection Without Signal Buffering for
the MCU
.............................................
27
5.10
Parameter Information
..............................
28
5.11
Test Load Circuit
....................................
28
5.12
Power Sequencing
..................................
29
5.13
Clock Specifications
.................................
32
5.14
Flash Timing
........................................
35
6
Detailed Description
...................................
37
6.1
Overview
............................................
37
6.2
Memory Maps
.......................................
47
6.3
Register Maps
.......................................
58
6.4
Device Emulation Registers
.........................
60
6.5
VREG, BOR, POR
..................................
62
6.6
System Control
......................................
64
6.7
Low-power Modes Block
............................
73
6.8
Interrupts
............................................
74
6.9
Peripherals
..........................................
79
7
Applications, Implementation, and Layout
......
156
7.1
TI Design or Reference Design
....................
156
7.2
Development Tools
................................
157
7.3
Software Tools
.....................................
157
7.4
Training
............................................
158
8
Device and Documentation Support
..............
159
8.1
Device Support
.....................................
159
8.2
Documentation Support
............................
161
8.3
Related Links
......................................
162
8.4
Community Resources
.............................
162
8.5
Trademarks
........................................
162
8.6
Electrostatic Discharge Caution
...................
162
8.7
Glossary
............................................
162
9
Mechanical Packaging and Orderable
Information
.............................................
163
9.1
Packaging Information
.............................
163