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TX pacer and interrupt combiner
RX pacer and interrupt combiner
MACTXINT0
MACRXINT0
Common interrupt combiner
MACINT0
TX pacer and interrupt combiner
MACTXINT1
RX pacer and interrupt combiner
MACRXINT1
Common interrupt combiner
MACINT1
TX pacer and interrupt combiner
MACTXINT2
RX pacer and interrupt combiner
MACRXINT2
Common interrupt combiner
MACINT2
TX pacer and interrupt combiner
MACTXINT3
RX pacer and interrupt combiner
MACRXINT3
Common interrupt combiner
MACINT3
TX pacer and interrupt combiner
MACTXINT4
RX pacer and interrupt combiner
MACRXINT4
Common interrupt combiner
MACINT4
TX pacer and interrupt combiner
MACTXINT5
RX pacer and interrupt combiner
MACRXINT5
Common interrupt combiner
MACINT5
Registers
Prescaler
PS_TICK
EMAC
interrupts (18)
MDIO
interrupts (2)
Peripheral bus
reset
Peripheral bus
clock
To GEM0
To GEM1
To GEM2
To GEM3
To GEM5
To GEM4
Peripheral bus
www.ti.com
EMAC Functional Architecture
–
Interrupt combiner
•
Common Interrupt Combiner (CIC)
•
Prescaler
•
Registers
•
CFG peripheral bus interface
Figure 14. EMIC Block Diagram
41
SPRUEF8F – March 2006 – Revised November 2010
C6472/TCI6486 EMAC/MDIO
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