Texas Instruments TIDA-010046, Design Manual

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3.6V
D29
1SMB5914BT3G
GND_2
1000 ohm
L9
2.2µF
C64
GND_2
VDD_PSE
OUT
1
FB
2
4
EN
5
IN
8
9
GND EP
U14A
TPS7A4001DGNR
10µF
C67
10µF
C68
0.01µF
C87
GND_2 GND_2 GND_2
0.01µF
C65
GND_2 GND_2 GND_2
VPWR +3V3_PSE
25.5k
R101
46.4k
R99
825k
R78
32.4k
R100
+
±
VPWR
R
UP
R
DOWN
TPS23861
VPWR
VDD
VPWR
VDD
RESET
V
RESET
= VIL (0.9 V Max)
V
VPWR
> V
UVLOPW_R
(18.5 V Max)
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System Overview
17 TIDUES1A – October 2019 – Revised February 2020
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EMC Compliant 10/100-Mbps Ethernet PHY Reference Design With IEEE
802.3at Type-1 ( ≤ 12.95 W) PoE-PD
Figure 13. TPS23861 Power On Sequence
2.4.8 PoE-PD Circuit Design on PD Side Board
See TIDA-0010034 for more details about PoE PoE implementation supporting IEEE 802.3at standard as
a 13 W, Type 1 PD using the TPS23755 device.
2.4.9 Clock Requirement
The DP83825I device supports an external CMOS-level oscillator source or an internal oscillator with an
external crystal. The use of a 25-MHz, parallel, 20-pF load crystal is recommended if a crystal source is
desired.
Figure 14 shows a typical connection diagram for a crystal resonator circuit. Note that the load
capacitor values will vary with the crystal vendors. Check with the vendor for the recommended loads. For
more details, see the
Selection and Specification of Crystals for Texas Instruments Ethernet Physical
Layer Transceivers application report. Adjust the series resistance value to meet the crystal drive level.
The design uses the oscillator circuit to drive a crystal with a maximum drive level of 100 µW. If a crystal is
specified for a lower drive level, a current-limiting resistor must be placed in series between XO and the
crystal. As a starting point for evaluating an oscillator circuit, if the requirements for the crystal are not
known, set the values for CL1 and CL2 at 20 pF. Set R1 at 0
Ω
. Specifications for a 25-MHz crystal are
listed in Table 6 .