THS1031
3-V TO 5.5-V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002
7
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions, AV
DD
= 3 V, DV
DD
= 3 V,
f
s
= 30 MSPS/50% duty cycle, MODE = AV
DD
, 2-V input span from 0.5 V to 2.5 V, external reference,
PGA = 1X, T
A
= T
min
to T
max
(unless otherwise noted) (continued)
PGA
PARAMETER
MIN
TYP
MAX
UNIT
Gain range (linear scale)
0.5
4
V/V
Gain step size (linear scale)
0.5
V/V
Gain error from nominal
3%
Number of control bits
3
Bits
clamp amplifier and clamp DAC
PARAMETER
MIN
TYP
MAX
UNIT
Resolution
10
Bits
DAC output range
REFBF
REFTF
V
DAC differential nonlinearity
– 1
1
LSB
DAC integral nonlinearity
±
1
LSB
Clamping analog output voltage range
0.1
AVDD– 0.1
V
Clamping analog output voltage error
– 40
40
mV
clock
PARAMETER
MIN
TYP
MAX
UNIT
tc
Clock cycle
33
ns
tw(CKH)
Pulse duration, clock high
15
16.5
ns
tw(CKL)
Pulse duration, clock high
15
16.5
ns
td(o)
Clock to data valid, delay time
25
ns
Pipeline latency
3
Cycles
td(AP)
Aperture delay time
4
ns
Aperture uncertainty (jitter)
2
ps
timing
PARAMETER
MIN
TYP
MAX
UNIT
td(DZ)
Output disable to Hi-Z output, delay time
0
20
ns
td(DEN)
Output enable to output valid, delay time
0
20
ns
td(OEW)
Output disable to write enable, delay time
12
ns
td(WOE)
Write disable to output enable, delay time
12
ns
tw(WP)
Write pulse duration
15
ns
tsu
Input data setup time
5
ns
th
Input data hold time
5
ns
power supply
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ICC
Operating supply current
AVDD = 3 V, MODE = AGND
30.6
45
mA
PD
Power dissipation
AVDD = DVDD = 3 V
94
135
mW
PD
Power dissipation
AVDD = DVDD = 5 V
160
mW
PD(STBY)
Standby power
AVDD = DVDD = 3 V, MODE = AGND
3
5
mW
