Public Version
PRCM Register Manual
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Bits
Field Name
Description
Type
Reset
0
WKUP_EN
MPU peripherals group wake-up event mask
RW
0x0
0x0: MPU peripherals group wake-up event is masked
0x1: MPU peripherals group wake-up event generates an
interrupt
Table 3-322. Register Call Summary for Register PRM_IRQENABLE_MPU
PRCM Functional Description
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[7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18]
PRCM Basic Programming Model
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Interrupt Configuration Registers
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:
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Voltage Processor Initialization Basic Programming Model
[21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32]
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Changing OPP Using the SmartReflex Module
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Event Generator Programming Examples
PRCM Use Cases and Tips
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:
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:
PRCM Register Manual
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OCP_System_Reg PRM Register Summary
:
3.8.2.4
MPU_PRM Registers Registers
3.8.2.4.1 MPU_PRM Registers Register Summary
Table 3-323. MPU_PRM Register Summary
Register Name
Type
Register Width
Address Offset
Physical Address
Reset Type
(Bits)
RW
32
0x0000 0058
0x4830 6958
C
RW
32
0x0000 00C8
0x4830 69C8
W
RW
32
0x0000 00D4
0x4830 69D4
W
RW
32
0x0000 00D8
0x4830 69D8
W
RW
32
0x0000 00DC
0x4830 69DC
W
RW
32
0x0000 00E0
0x4830 69E0
W
R
32
0x0000 00E4
0x4830 69E4
C
RW
32
0x0000 00E8
0x4830 69E8
C
3.8.2.4.2 MPU_PRM Registers
568
Power, Reset, and Clock Management
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated