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PRCM Register Manual
Bits
Field Name
Description
Type
Reset
1
FORCEWKUP_EN
Force wake-up IVA2 domain transition completed event
RW
0x0
mask
0x0: Force wake-up IVA2 domain transition completed
event is masked
0x1: Force wake-up IVA2 domain transition completed
event generates an interrupt
0
WKUP_EN
IVA2 peripherals group wake-up event mask
RW
0x0
0x0: IVA2 peripherals group wake-up event is masked
0x1: IVA2 peripherals group wake-up event generates an
interrupt
Table 3-313. Register Call Summary for Register PRM_IRQENABLE_IVA2
PRCM Functional Description
•
•
:
•
:
PRCM Basic Programming Model
•
Interrupt Configuration Registers
:
PRCM Register Manual
•
3.8.2.3
OCP_System_Reg_PRM Registers
3.8.2.3.1 OCP_System_Reg PRM Register Summary
Table 3-314. OCP_System_Reg_PRM Register Summary
Register Name
Type
Register Width
Address Offset
Physical Address
Reset Type
(Bits)
R
32
0x0000 0004
0x4830 6804
C
RW
32
0x0000 0014
0x4830 6814
W
RW
32
0x0000 0018
0x4830 6818
W
RW
32
0x0000 001C
0x4830 681C
W
3.8.2.3.2 OCP_System_Reg_PRM Registers
Table 3-315. PRM_REVISION
Address Offset
0x0000 0004
Physical Address
0x4830 6804
Instance
OCP_System_Reg_PRM
Description
This register contains the IP revision code for the PRM part of the PRCM
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
REV
Bits
Field Name
Description
Type
Reset
31:8
RESERVED
Reads returns 0.
R
0x000000
7:0
REV
IP revision
R
0x10
[7:4] Major revision
[3:0] Minor revision
Examples: 0x10 for 1.0, 0x21 for 2.1
559
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated