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PRCM Functional Description
To let the software recalibrate the DPLL at the correct time depending on the device activity, the PRCM
module can generate a wake-up event on the MPU power domain, followed by an interrupt on the MPU
when the DPLL recalibration flag is asserted.
summarizes software programming control over the DPLL recalibration feature.
Table 3-44. DPLL Recalibration Controls
DPLL
Software Control
Description
DPLL1 (MPU) PRCM.
Enable/disable the MPU DPLL automatic recalibration
MPU_DPLL_DRIFTGUARD
feature.
Enable/disable the MPU DPLL recalibration interrupt
MPU_DPLL_RECAL_EN
to MPU.
[7] MPU_DPLL_ST
Status of the MPU DPLL recalibration interrupt
DPLL2 (IVA2) PRCM.
[3]
Enable/disable the IVA2 DPLL automatic recalibration
IVA2_DPLL_DRIFTGUARD
feature.
Enable/disable the IVA2 DPLL recalibration interrupt
IVA2_DPLL_RECAL_EN
to MPU.
[8] IVA2_DPLL_ST
Status of the IVA2 DPLL recalibration interrupt to
MPU
Enable/disable the IVA2 DPLL recalibration interrupt
IVA2_DPLL_RECAL_EN
to IVA2.2.
[2] IVA2_DPLL_ST
Status of the IVA2 DPLL recalibration interrupt to
IVA2.2
DPLL3
Enable/disable the CORE DPLL automatic
(CORE)
EN_CORE_DPLL_DRIFTGUARD
recalibration feature.
[5] CORE_DPLL_RECAL
Enable/disable the CORE DPLL recalibration interrupt
to MPU.
[5] CORE_DPLL_ST
Status of the CORE DPLL recalibration interrupt
DPLL4 (PER)
Enable/disable the PER DPLL automatic recalibration
EN_PERIPH_DPLL_DRIFTGUARD
feature.
Enable/disable the PER DPLL recalibration interrupt
PERIPH_DPLL_RECAL
to MPU.
[6] PERIPH_DPLL_ST
Status of the PER DPLL recalibration interrupt
DPLL5
[3]
Enable/disable the PER DPLL2 automatic
(PER2)
EN_PERIPH2_DPLL_DRIFTGUARD
recalibration feature.
Enable/disable the PER DPLL2 recalibration interrupt
SND_PERIPH_DPLL_RECAL_EN
to MPU.
Status of the PER DPLL2 recalibration interrupt
SND_PERIPH_DPLL_ST
NOTE:
DPLL recalibration is not necessary in real use (specified operating voltage and temperature
range).
3.5.3.6.6 DPLL Programming Sequence
The DPLL programming sequence follows:
1. Set the M and N values for the desired CLKOUT frequency (see
2. Set the corresponding output dividers (M2, M3, M4, M5, and M6) (see
3. Enable/disable the auto-recalibration feature (see
4. Enable/disable the autoidle feature (see
).
5. Mask/unmask the interrupt to the MPU (and the DPLL2 interrupt to IVA2) (see
6. Enable the DPLL lock mode (see
333
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated