Texas Instruments OMAP36 Series, Technical Reference Manual

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PRCM Register Manual
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Table 3-295. Register Call Summary for Register CM_CLKSTST_USBHOST
PRCM Basic Programming Model
• CM_CLKSTST_ <domain_name> (Clock State Status Register) : [0]
PRCM Register Manual
• USBHOST_CM Register Summary : [1]
3.8.2 PRM Module Registers
This section describes the PRM module registers. Table 3-296 lists the physical address of the the PRM
modules. Table 3-297 through Table 3-535 provide register mapping summaries and describe the bits in
the individual registers.
3.8.2.1 PRM Instance Summary
Table 3-296. PRM Instance Summary
Module Name Base address (hex) Size
IVA2_PRM 0x4830 6000 8192 bytes
OCP_System_Reg_PRM 0x4830 6800 8192 bytes
MPU_PRM 0x4830 6900 8192 bytes
CORE_PRM 0x4830 6A00 8192 bytes
SGX_PRM 0x4830 6B00 8192 bytes
WKUP_PRM 0x4830 6C00 8192 bytes
Clock_Control_Reg_PRM 0x4830 6D00 8192 bytes
DSS_PRM 0x4830 6E00 8192 bytes
CAM_PRM 0x4830 6F00 8192 bytes
PER_PRM 0x4830 7000 8192 bytes
EMU_PRM 0x4830 7100 8192 bytes
Global_Reg_PRM 0x4830 7200 65536 bytes
NEON_PRM 0x4830 7300 8192 bytes
USBHOST_PRM 0x4830 7400 8192 bytes
3.8.2.2 IVA2_PRM Registers
3.8.2.2.1 IVA2_PRM Register Summary
Table 3-297. IVA2_PRM Register Summary
Register Name Type Register Width Address Offset Physical Address Reset Type
(Bits)
RM_RSTCTRL_IVA2 RW 32 0x0000 0050 0x4830 6050 C ( refer to
Section
3.6.3.1.2 )
RM_RSTST_IVA2 RW 32 0x0000 0058 0x4830 6058 C
PM_WKDEP_IVA2 RW 32 0x0000 00C8 0x4830 60C8 W
PM_PWSTCTRL_IVA2 RW 32 0x0000 00E0 0x4830 60E0 W
PM_PWSTST_IVA2 R 32 0x0000 00E4 0x4830 60E4 C
PM_PREPWSTST_IVA2 RW 32 0x0000 00E8 0x4830 60E8 C
PRM_IRQSTATUS_IVA2 RW 32 0x0000 00F8 0x4830 60F8 W
PRM_IRQENABLE_IVA2 RW 32 0x0000 00FC 0x4830 60FC W
548 Power, Reset, and Clock Management SWPU177N – December 2009 – Revised November 2010
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