Texas Instruments OMAP36 Series, Technical Reference Manual

Page: 463 / 3738

Public Version
www.ti.com
PRCM Register Manual
Bits Field Name Description Type Reset
31:3 RESERVED Write 0s for future compatibility. Read returns 0. R 0x00000000
2:0 AUTO_IVA2_DPLL IVA2 DPLL automatic control; Other enums: Reserved RW 0x0
0x0: Auto control disabled
0x1: IVA2 DPLL is automatically put in low power stop
mode when the IVA2 clock is not required anymore. It is
also restarted automatically.
Table 3-106. Register Call Summary for Register CM_AUTOIDLE_PLL_IVA2
PRCM Functional Description
• DPLL Modes : [0]
• DPLL Source-Clock Controls : [1]
PRCM Basic Programming Model
• CM_AUTOIDLE_PLL_ <processor_name> (Processor DPLL Autoidle Register) : [2]
PRCM Register Manual
• IVA2_CM Register Summary : [3]
Table 3-107. CM_CLKSEL1_PLL_IVA2
Address Offset 0x0000 0040
Physical Address 0x4800 4040 Instance IVA2_CM
Description This register provides controls over the IVA2 DPLL.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED IVA2_DPLL_MULT IVA2_DPLL_DIV
RESERVED
IVA2_CLK_SRC
Bits Field Name Description Type Reset
31:22 RESERVED Write 0s for future compatibility. Read returns 0. R 0x000
21:19 IVA2_CLK_SRC Selects the IVA2 DPLL bypass source clock; Other RW 0x1
enums: Reserved
0x1: DPLL2_FCLK is CORE_CLK divided by 1
0x2: DPLL2_FCLK is CORE.CLK divided by 2
0x4: DPLL2_FCLK is CORE.CLK divided by 4
18:8 IVA2_DPLL_MULT IVA2 DPLL multiplier factor (0 to 2047) RW 0x000
7 RESERVED Write 0s for future compatibility. Read returns 0. R 0x0
6:0 IVA2_DPLL_DIV IVA2 DPLL divider factor (0 to 127) RW 0x00
Table 3-108. Register Call Summary for Register CM_CLKSEL1_PLL_IVA2
PRCM Functional Description
• Processor Clock Configurations : [0] [1]
• Interface and Peripheral Functional Clock Configurations : [2] [3]
PRCM Basic Programming Model
• CM_CLKSELn_PLL_ <processor_name> (Processor DPLL Clock Selection Register) : [4]
PRCM Use Cases and Tips
• Switch VDD1 OPPs : [5] [6] [7] [8]
PRCM Register Manual
• IVA2_CM Register Summary : [9]
• IVA2_CM Registers :
463 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated