Texas Instruments OMAP36 Series, Technical Reference Manual

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PRCM Register Manual
3.8 PRCM Register Manual
This section gives information about all modules and features in the high-tier device. For
power-management saving consideration, ensure that power domains of unavailable features and
modules are switched off and clocks are cut off.
Table 3-95 lists the Instance Summary of the CM modules. Table 3-96 through Table 3-294 provide
register mapping summaries of the CM registers and describe the bits in the individual registers.
Table 3-296 lists the Instance Summary of the PRM modules. Table 3-297 through Table 3-535 provide
register mapping summaries of the PRM registers and describe the bits in the individual registers.
3.8.1 CM Module Registers
3.8.1.1 CM Instance Summary
Table 3-95. CM Instance Summary
Module Name Base Address (hex) Size
IVA2_CM 0x4800 4000 8192 bytes
OCP_System_Reg_CM 0x4800 4800 8192 bytes
MPU_CM 0x4800 4900 8192 bytes
CORE_CM 0x4800 4A00 8192 bytes
SGX_CM 0x4800 4B00 8192 bytes
WKUP_CM 0x4800 4C00 8192 bytes
Clock_Control_Reg_CM 0x4800 4D00 8192 bytes
DSS_CM 0x4800 4E00 8192 bytes
CAM_CM 0x4800 4F00 8192 bytes
PER_CM 0x4800 5000 8192 bytes
EMU_CM 0x4800 5100 8192 bytes
Global_Reg_CM 0x4800 5200 8192 bytes
NEON_CM 0x4800 5300 8192 bytes
USBHOST_CM 0x4800 5400 8192 bytes
3.8.1.2 IVA2_CM Registers
3.8.1.2.1 IVA2_CM Register Summary
Table 3-96. IVA2_CM Register Summary
Register Name Type Register Width Address Offset Physical Address Reset Type
(Bits)
CM_FCLKEN_IVA2 RW 32 0x0000 0000 0x4800 4000 W
CM_CLKEN_PLL_IVA2 RW 32 0x0000 0004 0x4800 4004 W
CM_IDLEST_IVA2 R 32 0x0000 0020 0x4800 4020 C
CM_IDLEST_PLL_IVA2 R 32 0x0000 0024 0x4800 4024 C
CM_AUTOIDLE_PLL_IVA2 RW 32 0x0000 0034 0x4800 4034 W
CM_CLKSEL1_PLL_IVA2 RW 32 0x0000 0040 0x4800 4040 W
CM_CLKSEL2_PLL_IVA2 RW 32 0x0000 0044 0x4800 4044 W
CM_CLKSTCTRL_IVA2 RW 32 0x0000 0048 0x4800 4048 W
CM_CLKSTST_IVA2 R 32 0x0000 004C 0x4800 404C C
459 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
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