Public Version
PRCM Register Manual
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Table 3-102. Register Call Summary for Register CM_IDLEST_IVA2
PRCM Basic Programming Model
•
CM_IDLEST_ <domain_name> (Idle-Status Register)
:
PRCM Register Manual
•
Table 3-103. CM_IDLEST_PLL_IVA2
Address Offset
0x0000 0024
Physical Address
0x4800 4024
Instance
IVA2_CM
Description
This register allows monitoring the master clock activity. This register is read only and automatically
updated.
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
ST_IVA2_CLK
Bits
Field Name
Description
Type
Reset
31:1
RESERVED
Read returns 0.
R
0x00000000
0
ST_IVA2_CLK
IVA2_CLK activity
R
0x0
0x0: IVA2 DPLL is bypassed
0x1: IVA2 DPLL is locked
Table 3-104. Register Call Summary for Register CM_IDLEST_PLL_IVA2
PRCM Basic Programming Model
•
CM_IDLEST_PLL_ <processor_name> (Processor DPLL Idle-Status Register)
PRCM Register Manual
•
Table 3-105. CM_AUTOIDLE_PLL_IVA2
Address Offset
0x0000 0034
Physical Address
0x4800 4034
Instance
IVA2_CM
Description
This register provides automatic control over the IVA2 DPLL activity.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
AUTO_IVA2_DPLL
462
Power, Reset, and Clock Management
SWPU177N – December 2009 – Revised November 2010
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