J721E EVM Hardware Architecture
48
SPRUIS4A – December 2019 – Revised May 2020
Copyright © 2019–2020, Texas Instruments Incorporated
Jacinto7 J721E/DRA829/TDA4VM Evaluation Module (EVM)
4.8.5
Board ID EEPROM Interface
The J721E EVM boards are identified by its version and serial number, which are stored in the onboard
EEPROM. The EEPROM is accessible from WKUP I2C0 port of J721E processor.
The board ID EEPROM I2C slave address of various boards are listed in the I2C mapping table.
The J721E SoM board includes a CAV24C256WEI2C EEPROM ID memory. The first 259 bytes of
addressable EEPROM memory are preprogrammed with identification information for each board. The
remaining 32509 bytes are available to the user for data or code storage.
Table 26. Board ID Memory Header Information
Header
Field Name
Size (bytes)
Comments
EE3355AA
MAGIC
4
Magic Number
TYPE
1
Fixed length and variable position board ID header
2
Size of payload
BRD_INFO
TYPE
1
Payload type
Length
2
Offset to next header
Board_Name
16
Name of the board
Design_Rev
2
Revision number of the design
PROC_Nbr
4
PROC number
Variant
2
Design variant number
PCB_Rev
2
Revision number of the PCB
SCHBOM_Rev
2
Revision number of the schematic
SWR_Rev
2
First software release number
VendorID
2
Build_Week
2
Week of the year of production
Build_Year
2
Year of production
BoardID
6
Serial_Nbr
4
Incrementing board number
DDR_INFO
TYPE
1
Length
2
Offset to next header
DDR control
2
DDR Control Word
MAC_ADDR
TYPE
1
Payload type
Length
2
Size of payload
MAC control
2
MAC header control word
MAC_adrs
192
END_LIST
TYPE
1
End Marker
4.8.6
Boot EEPROM Interface
A 1-Mbit EEPROM is interfaced to MCU_I2C0 for booting, I2C address set to 0x50, 0x51.
