Texas Instruments CC112 Series, User Manual, Page: 103 / 109

CC112X/CC1175
SWRU295C Page 103 of 108
TX_STATUS - TX Status
Bit no. Name Reset R/W Description
7:6 TX_STATUS_NOT_USED 0x00 R
5 TX_STATUS_RESERVED5 0x00 R For test purposes only
4 SYNC_SENT 0x00 R Last bit of sync word has been sent
3 TXFIFO_FULL 0x00 R Asserted when the TX FIFO is full. De-asserted when the number of bytes is
below threshold
2 TXFIFO_OVER_THR 0x00 R Asserted when number of bytes is greater than or equal to the TX FIFO
threshold
1 TXFIFO_OVERFLOW 0x00 R Asserted when the TX FIFO has overflowed (The user have tried to write to a full
TX FIFO). De-asserted when the TX FIFO is flushed
0 TXFIFO_UNDERFLOW 0x00 R Asserted when the TX FIFO has underflowed (TX FIFO is empty before the
complete packet is sent). De-asserted when the TX FIFO is flushed
MARC_STATUS1 - MARC Status , Reg 1
Bit no. Name Reset R/W Description
7:0 MARC_STATUS_OUT 0x00 R This register should be read to find what caused the
MARC_MCU_WAKEUP
signal
to be asserted
00000000 No failure
00000001 RX timeout occurred
00000010 RX termination based on CS or PQT
00000011 eWOR sync lost (16 slots with no successful reception)
00000100 Packet discarded due to maximum length filtering
00000101 Packet discarded due to address filtering
00000110 Packet discarded due to CRC filtering
00000111 TX FIFO overflow error occurred
00001000 TX FIFO underflow error occurred
00001001 RX FIFO overflow error occurred
00001010 RX FIFO underflow error occurred
00001011 TX ON CCA failed
01000000 TX finished successfully
10000000 RX finished successfully (a packet is in the RX FIFO ready to be
read)
MARC_STATUS0 - MARC Status , Reg 0
Bit no. Name Reset R/W Description
7:4 MARC_STATUS_NOT_USED 0x00 R
3 MARC_STATUS0_RESERVED3 0x00 R For test purposes only
2 TXONCCA_FAILED 0x00 R
This bit can be read after the
TXONCCA_DONE
signal has been asserted
0 The channel was clear. The radio will enter TX state
1 The channel was busy. The radio will remain in RX state
1 MCU_WAKE_UP 0x00 R
MCU wake up signal. Read
MARC_STATUS1.MARC_STATUS_OUT
to find the
cause of the wake up event
0 RCC_CAL_VALID 0x00 R RCOSC has been calibrated at least once
PA_IFAMP_TEST
Bit no. Name Reset R/W Description
7:5 PA_IFAMP_TEST_NOT_USED 0x00 R
4:0 PA_IFAMP_TEST_RESERVED4_0 0x00 R/W For test purposes only, use values from SmartRF Studio
FSRF_TEST
Bit no. Name Reset R/W Description
7 FSRF_TEST_NOT_USED 0x00 R
6:0 FSRF_TEST_RESERVED6_0 0x00 R/W For test purposes only, use values from SmartRF Studio