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Typical values stated where T
A
= 25°C and V
BAT
= 59.2 V, min/max values stated where T
A
= -40°C to 85°C and V
BAT
= 4.7 V
to 80 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
DEEPSLEEP_1
DEEPSLEEP Mode
No monitoring or protections, REG1 = 3.3 V with
no load, REG2 = OFF, LFO = ON, no
communication
10.7
µA
I
DEEPSLEEP_2
DEEPSLEEP Mode
No monitoring or protections, REG1 = 3.3 V with
no load, REG2 = OFF, LFO = OFF, no
communication
9.2
µA
I
SHUTDOWN
SHUTDOWN Mode
All blocks powered down, with the exception of
the TS2 wakeup circuit, no monitoring or
protections, no communication
1
3.1
µA
(1)
Operation with VBAT up to 80 V is supported when the charge pump is not in operation. Whenever the charge pump is in operation (in
5.5 V or 11 V mode), the maximum voltage on VBAT should be reduced to ensure the voltage on CP1, CHG, and DSG does not
exceed their maximum specified voltage.
7.6 Digital I/O
Typical values stated where T
A
= 25°C and V
BAT
= 59.2 V, min/max values stated where T
A
= -40°C to 85°C and V
BAT
= 4.7 V
to 80 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
IH
High-level input
ALERT (configured as HDQ), SCL, SDA,
HDQ, CFETOFF, DFETOFF, RST_SHUT
0.66 x
V
REG18
5.5
V
V
IL
Low-level input
ALERT (configured as HDQ), SCL, SDA,
HDQ, CFETOFF, DFETOFF, RST_SHUT
0.33 x
V
REG18
V
V
OH
Output voltage high, TS2
TS2 during SHUTDOWN mode, V
BAT
> 6
V
4.5
6
V
V
OH
Output voltage high, TS2 low voltage
TS2 during SHUTDOWN mode, 4.7 V ≤
V
BAT
≤ 6 V
3
6
V
V
OH
Output voltage high, 5 V case
ALERT, SDA (configured as SPI_MISO),
SCL (configured as SPI_SCLK),
CFETOFF (configured as GPO),
DFETOFF (configured as GPO), DCHG,
DDSG, pins driving from REG1, V
REG1
set to 5 V nominal setting, V
BAT
> 8 V, I
OH
= -5.0 mA, 10 pF load
0.9 x
V
REG1
V
REG1
V
V
OL
Output voltage low, 5 V case
ALERT, SCL, SDA, HDQ, DCHG, DDSG,
CFETOFF (configured as GPO),
DFETOFF (configured as GPO), pins
driving from REG1, V
REG1
set to 5 V
nominal setting, V
BAT
> 8 V, I
OL
= 5 mA,
10 pF load
0.77
V
R
OH
Output weak high resistance
TS2 during SHUTDOWN mode
4600
kΩ
C
IN
Input capacitance
ALERT, SCL, SDA, HDQ, CFETOFF,
DFETOFF, DCHG, DDSG, REGIN, TS1,
TS2, TS3
2
pF
I
LKG
Input leakage current
ALERT, SCL, SDA, HDQ, CFETOFF,
DFETOFF, DCHG, DDSG, REGIN, device
in SHUTDOWN mode
1
µA
(1)
Operation with V
BAT
up to 80 V is supported when the charge pump is not in operation. Whenever the charge pump is in operation (in
5.5 V or 11 V mode), the maximum voltage on V
BAT
should be reduced to ensure the voltage on CP1, CHG, and DSG does not exceed
their maximum specified voltage.
(2)
Specified by design
SLUSE91A – SEPTEMBER 2020 – REVISED FEBRUARY 2021
Copyright © 2021 Texas Instruments Incorporated
11
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