TPCE636 User Manual Issue 1.0.2
Page 42 of 104
7.4.5 Programming User FPGA SPI Configuration Flash
To program the User FPGA SPI Configuration Flash the
User FPGA Configuration Mode
must be set to
Master Serial / SPI
and the ISP Mode must be enabled.
The following procedure is required for User FPGA SPI Configuration Flash programming and subsequent
reconfiguration of the User FPGA.
-
Enable the ISP Mode in the ISP Mode Enable Register.
-
Assure that User FPGA Configuration Mode is set to SPI Flash. If the
FPGA is not configured or if it is possible that the FPGA accesses the SPI
flash during BCC access set FP_RE_CFG = 0b1. Link must be set to
disable previously!
-
Read Configuration data from Configuration File and write Data to the In
Circuit Programming Data Space. 256Byte (1 SPI Flash page) each time
can be programmed maximally.
-
Set the programming start address and write instruction in the ISP
Configuration Register.
-
Start the Instruction with ISP Command Register
-
Wait on ISP SPI Instruction Done or ISP SPI Page Data Done for next
write instruction.
-
Process should be repeated until all configuration data is written to the SPI
Flash
-
After completion of the data programming, the ISP Mode bit must be
cleared to set configuration path to User FPGA and a Reconfiguration can
be performed.
A successful configuration of the User FPGA is indicated with FP_DONE_STAT in the User FPGA
Configuration Control/Status Register and the on-board User FPGA Done LED.
The Programming Instruction always starts at address 0x00 to write data from the ISP Programming
Data Space to the SPI flash.
If not all configuration data bytes are written, the User FPGA is not configured correctly.
Set
ISP_ENA
= 1
Set
FP_CFG_MD
= 1
Set
FP_RE_CFG
= 1
Read Config. Data from
Config. File and
Write Config. Data to
ISP Data Space
Write SPI Address to
ISP_SPI_ADD
Write SPI Instruction to
ISP_SPI_INS
Start Instruction with
ISP_SPI_INS_CMD
= 1
Read ISP Status
Register
Inst. busy ?
yes
no
End of File ?
yes
no
Set
FP_CFG_MD
= 0
Set
ISP_ENA
= 0
